IP Library Granted Patent US 9,390,855
Granted Patent B2
US 9,390,855 · App. 14/582,260 · Granted Jul 12, 2016

Monolithic ceramic capacitor containing perovskite compound

Inventors: Yoshito Saito (Nagaokakyo, JP); Jun Ikeda (Nagaokakyo, JP); Kazuhisa Uchida (Nagaokakyo, JP)
Assignee: Murata Manufacturing Co., Ltd.
H01G4/1218H01G4/0085H01G4/1227H01G4/30G01N23/2252H01G4/2325
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Quick Facts
Patent No.
US 9,390,855
App. No.
14/582,260
Granted
Jul 12, 2016
Kind
B2
Abstract

In a monolithic ceramic capacitor, ceramic layers defining inner layers are mainly composed of a perovskite compound containing Ba and Ti. A portion of an electrically effective section in the ceramic layers near a connecting portion between the inner electrodes and an outer electrode undergoes mapping analysis by an energy-dispersive method. In regions of the resulting mapping image, the regions extending from the interfaces between the inner electrodes and a corresponding one of the ceramic layers to positions about ⅓ of the thickness of the ceramic layer in the stacking direction, ((L2−L3)/L1)×100≧50 is satisfied, where L1 represents the total length of grain boundaries, L2 represents the total length of grain boundaries where a rare-earth element is present, and L3 represents the total length of portions where the grain boundaries where the rare-earth element is present are overlapped with grain boundaries with a specific element present.

Claims (39)

1. A monolithic ceramic capacitor comprising:

a ceramic body including:

a plurality of dielectric ceramic layers; and

a plurality of inner electrodes alternately stacked with the plurality of dielectric ceramic layers in a stacking direction; and

outer electrodes arranged on external surfaces of the ceramic body and electrically connected to respective ones of the inner electrodes; wherein

each of the dielectric ceramic layers contains, as its main component, a perovskite compound containing Ba and Ti and further contains at least one of Mn, Mg, and Si;

a portion of an electrically effective section of the dielectric ceramic layers sandwiched between the inner electrodes is observed with a transmission electron microscope (TEM) and subjected to mapping analysis by energy-dispersive X-ray spectroscopy (EDS), the portion being located in an area at or near a connecting portion between the inner electrodes and a corresponding one of the outer electrodes; and

in regions of a resulting mapping image obtained by the mapping analysis and a resulting TEM transmission image, the regions extending from interfaces between the inner electrodes and a corresponding one of the dielectric ceramic layers to positions about ⅓ of a thickness of a corresponding one of the dielectric ceramic layers in the stacking direction, a relationship ((L2−L3)/L1)×100≧50 is satisfied, where L1 represents a total length of ceramic grain boundaries detected from the TEM transmission image obtained by the TEM observation, L2 represents a total length of grain boundaries where a rare-earth element is present, the grain boundaries being detected from a mapping image obtained by the mapping analysis and the TEM transmission image; and L3 represents a total length of portions where the grain boundaries where the rare-earth element is present are overlapped with grain boundaries where at least one of Mn, Mg, and Si is present, the grain boundaries being detected from the mapping image obtained by the mapping analysis and the TEM transmission image.

2. The monolithic ceramic capacitor according to claim 1 , wherein the rare-earth element contains one or more elements selected from Dy, Tb, Ho, Y, Er, Gd, and La.

3. The monolithic ceramic capacitor according to claim 1 , wherein the ceramic layers defining inner layers include at least one of a Mg compound and a Mn compound.

4. The monolithic ceramic capacitor according to claim 1 , wherein each of the ceramic layers defining inner layers has a thickness of about 0.3 μm to about 10.0 μm.

5. The monolithic ceramic capacitor according to claim 1 , wherein each of the ceramic layers defining inner layers has a thickness of about 0.3 μm to about 1.0 μm.

6. The monolithic ceramic capacitor according to claim 1 , wherein each of the ceramic layers defining inner layers has a thickness of about 0.3 μm to about 0.5 μm.

7. The monolithic ceramic capacitor according to claim 1 , wherein the inner electrodes are made of one of Ni and a Ni alloy.

8. The monolithic ceramic capacitor according to claim 1 , wherein each of the inner electrodes has a thickness of about 0.3 μm to about 2.0 μm.

9. The monolithic ceramic capacitor according to claim 1 , wherein each of the inner electrodes has a thickness of about 0.3 μm to about 0.55 μm.

10. The monolithic ceramic capacitor according to claim 1 , wherein each of the inner electrodes has a thickness of about 0.3 μm to about 0.4 μm.

11. The monolithic ceramic capacitor according to claim 1 , wherein the outer electrodes are made of one of Ni, Cu, Ag, Pd, an Ag—Pd alloy, and Au.

12. The monolithic ceramic capacitor according to claim 1 , wherein a Ni plating layer and a Sn plating layer are arranged on a surface of each of the outer electrodes.

13. The monolithic ceramic capacitor according to claim 1 , wherein the monolithic ceramic capacitor has a length of about 2.0 mm, a width of about 1.25 mm, and a height of about 0.5 mm.

14. A monolithic ceramic capacitor comprising:

a ceramic body including:

a plurality of dielectric ceramic layers; and

a plurality of Ni-containing inner electrodes alternately stacked with the plurality of dielectric ceramic layers in a stacking direction; and

outer electrodes arranged on external surfaces of the ceramic body and electrically connected to respective ones of the inner electrodes; wherein

each of the dielectric ceramic layers contains, as its main component, a perovskite compound containing Ba and Ti and optionally containing Ca, Sr and Zr;

a portion of an electrically effective section of the dielectric ceramic layers sandwiched between the inner electrodes is observed with a transmission electron microscope (TEM) and subjected to mapping analysis by energy-dispersive X-ray spectroscopy (EDS), the portion being located in an area at or near a connecting portion between the inner electrodes and a corresponding one of the outer electrodes; and

in regions of a resulting mapping image obtained by the mapping analysis and a resulting TEM transmission image, the regions extending from interfaces between the inner electrodes and a corresponding one of the dielectric ceramic layers to positions about ⅓ of a thickness of a corresponding one of the dielectric ceramic layers in the stacking direction, a relationship ((L2−L3)/L1)×100≧50 is satisfied, where L1 represents a total length of ceramic grain boundaries detected from the TEM transmission image obtained by the TEM observation, L2 represents a total length of grain boundaries where a rare-earth element is present, the grain boundaries being detected from a mapping image obtained by the mapping analysis and the TEM transmission image; and L3 represents a total length of portions where the grain boundaries where the rare-earth element is present are overlapped with grain boundaries where an element other than Ba, Ca, Sr, Ti, Zr, O and Ni is present, the grain boundaries being detected from the mapping image obtained by the mapping analysis and the TEM transmission image.

15. The monolithic ceramic capacitor according to claim 14 , wherein the rare-earth element contains one or more elements selected from Dy, Tb, Ho, Y, Er, Gd, and La.

16. The monolithic ceramic capacitor according to claim 14 , wherein the ceramic layers defining inner layers include at least one of a Mg compound and a Mn compound.

17. The monolithic ceramic capacitor according to claim 14 , wherein each of the ceramic layers defining inner layers has a thickness of about 0.3 μm to about 10.0 μm.

18. The monolithic ceramic capacitor according to claim 14 , wherein each of the ceramic layers defining inner layers has a thickness of about 0.3 μm to about 1.0 μm.

19. The monolithic ceramic capacitor according to claim 14 , wherein each of the ceramic layers defining inner layers has a thickness of about 0.3 μm to about 0.5 μm.

20. The monolithic ceramic capacitor according to claim 14 , wherein each of the inner electrodes has a thickness of about 0.3 μm to about 2.0 μm.

21. The monolithic ceramic capacitor according to claim 14 , wherein each of the inner electrodes has a thickness of about 0.3 μm to about 0.55 μm.

22. The monolithic ceramic capacitor according to claim 14 , wherein each of the inner electrodes has a thickness of about 0.3 μm to about 0.4 μm.

23. The monolithic ceramic capacitor according to claim 14 , wherein the outer electrodes are made of one of Ni, Cu, Ag, Pd, an Ag—Pd alloy, and Au.

24. The monolithic ceramic capacitor according to claim 14 , wherein a Ni plating layer and a Sn plating layer are arranged on a surface of each of the outer electrodes.

25. The monolithic ceramic capacitor according to claim 14 , wherein the monolithic ceramic capacitor has a length of about 2.0 mm, a width of about 1.25 mm, and a height of about 0.5 mm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2014
From: SAITO, YOSHITO; IKEDA, JUN; UCHIDA, KAZUHISA
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 034606/0456 →
Priority Claims (1)
JP 2013-272165 · Dec 27, 2013 · national
Continuity (1)
Related Publication 20150187497A1 · Jul 2, 2015