IP Library › Granted Patent US 9,406,757
Granted Patent B2
US 9,406,757 · App. 14/493,715 · Granted Aug 2, 2016

Semiconductor device and method of manufacturing semiconductor device

Inventors: Yuki Nakano (Kyoto, JP); Ryota Nakamura (Kyoto, JP)
Assignee: ROHM CO., LTD.
H01L29/1608H01L29/4236H01L29/42368H01L29/66068H01L29/7802H01L29/7803H01L29/7805H01L29/7813H01L29/0696H01L29/41766H01L29/45
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Quick Facts
Patent No.
US 9,406,757
App. No.
14/493,715
Granted
Aug 2, 2016
Kind
B2
Abstract

The semiconductor device according to the present invention includes: a semiconductor layer of a first conductivity type made of SiC having an Si surface; a gate trench dug down from the surface of the semiconductor layer; a gate insulating film formed on a bottom surface and a side surface of the gate trench so that the ratio of the thickness of a portion located on the bottom surface to the thickness of a portion located on the side surface is 0.3 to 1.0; and a gate electrode embedded in the gate trench through the gate insulating film.

Claims (24)

1. A semiconductor device comprising:

a semiconductor layer made of SiC;

a source region formed in the semiconductor layer, the source region forming a surface of the semiconductor layer;

a body region formed in the semiconductor layer, the body region being in contact with the source region from a side of a back surface of the semiconductor layer;

a drain region formed in the semiconductor layer, the drain region being in contact with the body region from the side of the back surface of the semiconductor layer;

a gate trench dug down in the semiconductor layer from the surface thereof, the gate trench passing through the source region and the body region and the deepest portion thereof reaching the drain region;

a gate insulating film formed on an inner surface of the gate trench, the gate insulating film having a bottom portion located on the bottom surface thereof and a side portion located on the side surface thereof, the thickness of the bottom portion and the thickness of the side portion being different from each other;

a gate electrode embedded in the gate trench on the gate insulating film;

a source wiring formed on the semiconductor layer and in contact with the source region, the source wiring having a laminating structure a first source layer formed on the semiconductor layer and a second source layer formed on the first source layer, the first source layer and the second source layer made of conductive materials different from each other; and

a source trench dug down in the semiconductor layer from the surface thereof, wherein

the first source layer is conformal to a side surface and a bottom surface of the source trench,

wherein the source wiring selectively forms a first junction with respect to the semiconductor layer, the first junction having a smaller junction barrier than the diffusion potential of a body diode intrinsic in the semiconductor device.

2. The semiconductor device according to claim 1 , wherein a non-ohmic contact is selectively formed between the source wiring and the semiconductor layer.

3. The semiconductor device according to claim 1 , wherein the gate trench and the source trench have the same depth.

4. The semiconductor device according to claim 2 , wherein the source trench is deeper than the gate trench.

5. The semiconductor device according to claim 2 , wherein

the source region is an n + -type source region,

the drain region is an n-type drain region, and

the body region has a p-type region forming the side surface of the gate trench, and a p + -type region forming the side surface of the source trench and having an impurity concentration larger than that of the p-type region.

6. The semiconductor device according to claim 5 , wherein an ohmic contact is selectively formed between the source wiring and the n + -type source region.

7. The semiconductor device according to claim 1 , wherein the gate trench is formed to surround the source trench in plan view.

8. The semiconductor device according to claim 1 , wherein the gate insulating film is a silicon oxynitride film formed by thermal oxidation with nitrogen-containing gas and the nitrogen content in the gate insulating film is 0.1 to 10%.

9. The semiconductor device according to claim 1 , wherein the thickness of the bottom portion of the gate insulating film is 150 to 500 Å.

10. The semiconductor device according to claim 1 , wherein the thickness of the side portion of the gate insulating film is 300 to 1000 Å.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 7, 2014
From: NAKANO, YUKI; NAKAMURA, RYOTA
To: ROHM CO., LTD.
Reel/Frame 033898/0754 →
Priority Claims (3)
JP 2008-330318 · Dec 25, 2008 · national
JP 2008-334480 · Dec 26, 2008 · national
JP 2009-293362 · Dec 24, 2009 · national
Continuity (3)
Continuation 13366966 · Feb 6, 2012
Division 12654620 · Dec 24, 2009
Related Publication 20150194492A1 · Jul 9, 2015