IP Library › Granted Patent US 9,418,989
Granted Patent B2
US 9,418,989 · App. 14/658,403 · Granted Aug 16, 2016

Semiconductor device and display device

Inventors: Hajime Kimura (Kanagawa, JP); Atsushi Umezaki (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/088G02F1/1339G02F1/1368G02F1/13306G02F1/136286H01L27/124H01L27/1225H01L29/7869
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Quick Facts
Patent No.
US 9,418,989
App. No.
14/658,403
Granted
Aug 16, 2016
Kind
B2
Abstract

A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

Claims (83)

1. A semiconductor device comprising:

a first to a fifth wirings; and

a shift register comprising a first to a fifth transistors,

wherein one of a first terminal and a second terminal of the first transistor is electrically connected to the first wiring,

wherein the other of the first terminal and the second terminal of the first transistor is electrically connected to the second wiring,

wherein one of a first terminal and a second terminal of the second transistor is electrically connected to the third wiring,

wherein the other of the first terminal and the second terminal of the second transistor is electrically connected to the second wiring,

wherein a gate of the second transistor is electrically connected to the fourth wiring,

wherein one of a first terminal and a second terminal of the third transistor is electrically connected to the third wiring,

wherein the other of the first terminal and the second terminal of the third transistor is electrically connected to the second wiring,

wherein a gate of the third transistor is electrically connected to the fifth wiring;

wherein one of a first terminal and a second terminal of the fourth transistor is electrically connected to a gate of the first transistor,

wherein one of a first terminal and a second terminal of the fifth transistor is electrically connected to the first wiring,

wherein the other of the first terminal and the second terminal of the fifth transistor is electrically connected to the gate of the first transistor, and

wherein a gate of the fifth transistor is electrically connected to the fifth wiring.

2. The semiconductor device according to claim 1 , wherein the other of the first terminal and the second terminal of the fourth transistor is electrically connected to the first wiring.

3. The semiconductor device according to claim 1 , wherein the fourth transistor is diode-connected.

4. The semiconductor device according to claim 1 , further comprising a gate driver,

wherein the gate driver comprises the shift register.

5. The semiconductor device according to claim 1 , further comprising:

a first substrate;

a driver circuit on the first substrate;

a second substrate over the first substrate and the driver circuit;

a sealant between the first substrate and the second substrate, and overlapping with the driver circuit; and

a liquid crystal layer between the first substrate and the second substrate,

wherein the driver circuit comprises the shift register.

6. A semiconductor device comprising:

a first to a fifth wirings; and

a shift register comprising a first to a sixth transistors,

wherein one of a first terminal and a second terminal of the first transistor is electrically connected to the first wiring,

wherein the other of the first terminal and the second terminal of the first transistor is electrically connected to the second wiring,

wherein one of a first terminal and a second terminal of the second transistor is electrically connected to the third wiring,

wherein the other of the first terminal and the second terminal of the second transistor is electrically connected to the second wiring,

wherein a gate of the second transistor is electrically connected to the fourth wiring,

wherein one of a first terminal and a second terminal of the third transistor is electrically connected to the third wiring,

wherein the other of the first terminal and the second terminal of the third transistor is electrically connected to the second wiring,

wherein a gate of the third transistor is electrically connected to the fifth wiring;

wherein one of a first terminal and a second terminal of the fourth transistor is electrically connected to a gate of the first transistor,

wherein one of a first terminal and a second terminal of the fifth transistor is electrically connected to the first wiring,

wherein the other of the first terminal and the second terminal of the fifth transistor is electrically connected to the gate of the first transistor,

wherein a gate of the fifth transistor is electrically connected to the fifth wiring,

wherein one of a first terminal and a second terminal of the sixth transistor is electrically connected to the second wiring,

wherein the other of the first terminal and the second terminal of the sixth transistor is electrically connected to the gate of the first transistor, and

wherein a gate of the sixth transistor is electrically connected to the first wiring.

7. The semiconductor device according to claim 6 , wherein each of the first to the sixth transistors comprises an oxide semiconductor layer.

8. The semiconductor device according to claim 6 , wherein the other of the first terminal and the second terminal of the fourth transistor is electrically connected to the first wiring.

9. The semiconductor device according to claim 6 , wherein the fourth transistor is diode-connected.

10. The semiconductor device according to claim 6 , further comprising a gate driver,

wherein the gate driver comprises the shift register.

11. The semiconductor device according to claim 6 , further comprising:

a first substrate;

a driver circuit on the first substrate;

a second substrate over the first substrate and the driver circuit;

a sealant between the first substrate and the second substrate, and overlapping with the driver circuit; and

a liquid crystal layer between the first substrate and the second substrate,

wherein the driver circuit comprises the shift register.

12. A semiconductor device comprising:

a first to a fifth wirings; and

a shift register comprising a first to a fifth transistors,

wherein one of a first terminal and a second terminal of the first transistor is electrically connected to the first wiring,

wherein the other of the first terminal and the second terminal of the first transistor is electrically connected to the second wiring,

wherein one of a first terminal and a second terminal of the second transistor is electrically connected to the third wiring,

wherein the other of the first terminal and the second terminal of the second transistor is electrically connected to the second wiring,

wherein a gate of the second transistor is electrically connected to the fourth wiring,

wherein one of a first terminal and a second terminal of the third transistor is electrically connected to the third wiring,

wherein the other of the first terminal and the second terminal of the third transistor is electrically connected to the second wiring,

wherein a gate of the third transistor is electrically connected to the fifth wiring;

wherein one of a first terminal and a second terminal of the fourth transistor is electrically connected to a gate of the first transistor,

wherein one of a first terminal and a second terminal of the fifth transistor is electrically connected to the first wiring,

wherein the other of the first terminal and the second terminal of the fifth transistor is electrically connected to the gate of the first transistor,

wherein a gate of the fifth transistor is electrically connected to the fifth wiring, and

wherein each of the first to the fifth transistors comprises an oxide semiconductor layer.

13. The semiconductor device according to claim 12 , wherein the other of the first terminal and the second terminal of the fourth transistor is electrically connected to the first wiring.

14. The semiconductor device according to claim 12 , wherein the fourth transistor is diode-connected.

15. The semiconductor device according to claim 12 , further comprising a gate driver,

wherein the gate driver comprises the shift register.

16. The semiconductor device according to claim 12 , further comprising:

a first substrate;

a driver circuit on the first substrate;

a second substrate over the first substrate and the driver circuit;

a sealant between the first substrate and the second substrate, and overlapping with the driver circuit; and

a liquid crystal layer between the first substrate and the second substrate,

wherein the driver circuit comprises the shift register.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2015
From: KIMURA, HAJIME; UMEZAKI, ATSUSHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 035389/0582 →
Priority Claims (1)
JP 2009-209099 · Sep 10, 2009 · national
Continuity (2)
Continuation 12875808 · Sep 3, 2010
Related Publication 20150185519A1 · Jul 2, 2015