IP Library › Granted Patent US 9,425,901
Granted Patent B2
US 9,425,901 · App. 14/552,159 · Granted Aug 23, 2016

Circuit arrangement and method for receiving digital optical signals

Inventors: Martin Groepl (Sonthofen Oberallgau, DE); Holger Fritsche (Heidenheim an der Brenz, DE); Holger Hoeltke (Munich, DE)
Assignee: SILICON LINE GmbH
H04B10/697H04B10/6911
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Quick Facts
Patent No.
US 9,425,901
App. No.
14/552,159
Granted
Aug 23, 2016
Kind
B2
Abstract

In order to be able to receive any digital optical signals in the bandwidth range from zero bits per second to the high Gbits/second range with as little circuit complexity as possible and to be able to process said signals with the least possible energy requirement for reprocessing, the invention proposes a circuit arrangement as well as a method for receiving digital optical signals by means of at least one light-receiving component connected upstream of at least one signal input port, particularly by means of at least one photodiode, wherein the unipolar current signal coming from the light-receiving component through the signal input port is transformed into a bipolar current signal by means of a compensation current provided by at least one current source, the value of said current being defined by means of at least one digital register.

Claims (20)

1. A circuit arrangement for receiving digital optical signals by means of at least one light-receiving component connected to at least one signal input port, said circuit arrangement comprising at least one digital register for defining a compensation current which is provided by at least one current source, and by means of said circuit arrangement a unipolar current signal coming from the light-receiving component through the signal input port can be transformed into a bipolar current signal by forming a difference between the unipolar current signal and the compensation current,

wherein the digital register comprises

at least one memory module and

at least one memory controller.

2. The circuit arrangement according to claim 1 , wherein the compensation current is set or adapted by at least one static digital signal.

3. The circuit arrangement according to claim 1 , wherein the current source is configured as at least one current digital/analogue converter connected to the memory module.

4. The circuit arrangement according to claim 1 , comprising at least one input stage configured as a transimpedance amplifier connected to the signal input port.

5. The circuit arrangement according to claim 4 , comprising a voltage digital/analogue converter which is connected to the digital register and by means of which the amplification of the input stage can be adapted.

6. The circuit arrangement according to claim 1 , comprising at least one end stage connected to the input stage for providing at least one output signal at output ports of the circuit arrangement.

7. The circuit arrangement according to claim 1 , comprising at least one preliminary stage or intermediate stage, said preliminary stage or intermediate stage being provided for adapting the amplitude of the signal coming from the input stage.

8. The circuit arrangement according to claim 1 , comprising at least one externally applied supply voltage in the range between approximately 2.5 volt and approximately 3.3 volt.

9. The circuit arrangement according to claim 8 , comprising at least one voltage regulator for generating an additional supply voltage, which is smaller than the externally applied supply voltage.

10. A method for receiving digital optical signals by means of at least one light-receiving component PD connected to a signal input port, wherein the unipolar current signal coming from the light-receiving component through the signal input port is transformed into a bipolar current signal by forming a difference between the unipolar current signal and a compensation current provided by at least one current source, the value of the compensation current being defined by at least one digital register,

wherein the signal input port is set for specific logic levels of the unipolar current signal by means of at least one memory controller associated with the digital register, wherein the memory controller can access at least one memory module.

11. The method according to claim 10 , wherein the unipolar current signal is modified by means of the current source in that the compensation current is directed or sunk from the signal input port against a reference potential.

12. The method according to claim 10 , wherein the amplification of at least one input state configured as a transimpedance amplifier and connected to the signal input port is adapted by means of at least one voltage digital/analogue converter.

13. A circuit arrangement for receiving digital optical signals by means of at least one light-receiving component connected to at least one signal input port, said circuit arrangement comprising:

at least one digital register for defining a compensation current which is provided by at least one current source, and by means of said circuit arrangement a unipolar current signal coming from the light-receiving component through the signal input port can be transformed into a bipolar current signal by forming a difference between the unipolar current signal and the compensation current;

at least one externally applied supply voltage in the range between approximately 2.5 volt and approximately 3.3 volt; and

at least one voltage regulator for generating an additional supply voltage, which is smaller than the externally applied supply voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2015
From: GROEPL, MARTIN; FRITSCHE, HOLGER; HOELTKE, HOLGER
To: SILICON LINE GMBH
Reel/Frame 034978/0874 →
Priority Claims (1)
DE 10 2012 104 420 · May 22, 2012 · national
Continuity (2)
Continuation PCTDE2013200015 · May 22, 2013
Related Publication 20150162992A1 · Jun 11, 2015