IP Library › Granted Patent US 9,438,261
Granted Patent B2
US 9,438,261 · App. 14/683,119 · Granted Sep 6, 2016

Capacitance-to-digital converter and method for providing a digital output signal

Inventors: Jose Manuel Garcia Gonzalez (Valencia, ES); Joel Bertomeu Mestre (Valencia, ES); Rafael Serrano Gotarredona (Valencia, ES)
Assignee: AMS AG
H03M1/1019H03M1/12H03M3/356H03M3/382H03M3/458G01R27/2605H03M3/34
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Quick Facts
Patent No.
US 9,438,261
App. No.
14/683,119
Granted
Sep 6, 2016
Kind
B2
Abstract

A capacitance-to-digital converter ( 10 ) comprises a capacitor arrangement ( 30 ), a converter ( 1 ) that is coupled on its input side to the capacitor arrangement ( 30 ) and a calibration unit ( 13 ) that is coupled on its input side to the converter ( 1 ). The capacitor arrangement ( 30 ) comprises an input capacitor ( 16 ).

Claims (29)

1. A capacitance-to-digital converter, comprising:

a capacitor arrangement comprising an input capacitor;

a converter that is coupled on its input side to the capacitor arrangement; and

a calibration unit that is coupled on its input side to the converter,

wherein the converter comprises an interface circuit that is coupled on its input side to the capacitor arrangement and comprises a first integrator having a first amplifier as well as a first and a second integrating capacitor,

wherein the interface circuit comprises a first and a second chopping unit, such that the first chopping unit couples a first and a second input of the first amplifier to a first terminal of the first integrating capacitor, and the second chopping unit couples the first and the second input of the first amplifier to a first terminal of the second integrating capacitor.

2. The capacitance-to-digital converter according to claim 1 , wherein the calibration unit is configured to provide a digital output signal that has a polynomial dependency from an input signal of the calibration unit or a signal derived from the input signal.

3. The capacitance-to-digital converter according to claim 1 , comprising a temperature sensor having an output coupled to the calibration unit and generating a temperature signal, wherein the calibration unit is configured to provide a digital output signal that has a polynomial dependency from an input signal of the calibration unit and from the temperature signal or a signal derived from the temperature signal.

4. The capacitance-to-digital converter according to claim 1 or 2 , comprising a memory that is coupled to the calibration unit, is realized as a non-volatile memory and stores calibration coefficients.

5. The capacitance-to-digital converter according to claim 1 or 2 , wherein the input capacitor is implemented as a capacitive sensor and the capacitor arrangement comprises a further capacitive sensor that detect the same parameter to be measured.

6. The capacitance-to-digital converter according to claim 1 or 2 , wherein the capacitor arrangement comprises a reference capacitor and the reference capacitor is realized such that the capacitance value of the reference capacitor can be trimmed or programmed.

7. The capacitance-to-digital converter according to claim 1 , wherein the interface circuit comprises a chopping unit that is arranged between the capacitor arrangement and the first integrator.

8. The capacitance-to-digital converter according to claim 1 , wherein a second terminal of the first integrating capacitor is coupled to a first output of the first amplifier, and a second terminal of the second integrating capacitor is coupled to a second output of the first amplifier.

9. The capacitance-to-digital converter according to claim 1 , wherein the interface circuit comprises an input-common-mode feedback circuit that comprises a control terminal for receiving a control signal and is designed to be enabled or disabled by the control signal.

10. The capacitance-to-digital converter according to claim 1 , wherein the converter is realized as a sigma-delta modulator that comprises the interface circuit.

11. A method for providing a digital output signal, comprising:

providing an analog sensor signal by an input capacitor;

generating a digital sensor signal by a converter as a function of the analog sensor signal; and

providing a digital output signal by a calibration unit that is coupled to the converter,

wherein the converter comprises an interface circuit that is coupled on its input side to the capacitor arrangement and comprises a first integrator having a first amplifier as well as a first and a second integrating capacitor,

wherein the interface circuit comprises a first and a second chopping unit, such that the first chopping unit couples a first and a second input of the first amplifier to a first terminal of the first integrating capacitor, and the second chopping unit couples the first and the second input of the first amplifier to a first terminal of the second integrating capacitor.

12. The method according to claim 11 , wherein the digital output signal has a polynomial dependency from an input signal of the calibration unit or a signal derived from the input signal.

13. A capacitance-to-digital converter, comprising:

a capacitor arrangement comprising an input capacitor;

a converter that is coupled on its input side to the capacitor arrangement; and

a calibration unit that is coupled on its input side to the converter,

wherein the converter comprises an interface circuit that is coupled on its input side to the capacitor arrangement and comprises a first integrator having a first amplifier as well as a first and a second integrating capacitor,

wherein the interface circuit comprises an input chopping unit that couples a first and a second input of the first amplifier to the capacitor arrangement, to a first terminal of the first integrating capacitor and to a first terminal of the second integrating capacitor, and

wherein the capacitor arrangement is directly connected to the first terminal of the first integrating capacitor and to the first terminal of the second integrating capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2015
From: GARCIA GONZALEZ, JOSE MANUEL; BERTOMEU MESTRE, JOEL; SERRANO GOTARREDONA, RAFAEL
To: AMS AG
Reel/Frame 036785/0626 →
Priority Claims (1)
EP 14171589 · Jun 6, 2014 · regional
Continuity (2)
Provisional Application 61977300 · Apr 9, 2014
Related Publication 20150295587A1 · Oct 15, 2015