IP Library Granted Patent US 9,450,121
Granted Patent B2
US 9,450,121 · App. 14/567,067 · Granted Sep 20, 2016

Solid-state imaging device and electronic apparatus

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Quick Facts
Patent No.
US 9,450,121
App. No.
14/567,067
Granted
Sep 20, 2016
Kind
B2
Abstract

A solid-state imaging device includes a photoelectric conversion device that includes a non-chalcopyrite-based compound semiconductor of at least one layer, which is lattice bonded or pseudo lattice bonded, and is formed on a silicon substrate, and a chalcopyrite-based compound semiconductor of at least one layer which is formed on the non-chalcopyrite-based compound semiconductor.

Claims (44)

1. A solid-state imaging device comprising:

a photoelectric conversion device that includes:

a non-chalcopyrite-based compound semiconductor of at least one layer, which is lattice bonded or pseudo lattice bonded, and is formed on a silicon substrate;

a chalcopyrite-based compound semiconductor of at least one layer which is formed on the non-chalcopyrite-based compound semiconductor; and

a charge accumulation layer formed on the silicon substrate, wherein the photoelectric conversion device has a charge blocking layer at least one of between the non-chalcopyrite-based compound semiconductor and the chalcopyrite-based compound semiconductor, and between the chalcopyrite-based compound semiconductor and an upper electrode.

2. The solid-state imaging device according to claim 1 ,

wherein the solid-state imaging device is a backside illumination type.

3. The solid-state imaging device according to claim 1 ,

wherein the solid-state imaging device has a global shutter function.

4. The solid-state imaging device according to claim 1 ,

wherein the first layer of a non-chalcopyrite-based compound semiconductor, which is in contact with the silicon substrate, is made of atoms that do not have a defect level around a mid-gap of Si.

5. The solid-state imaging device according to claim 4 ,

wherein the first layer of the non-chalcopyrite-based compound semiconductor, which is in contact with the silicon substrate, is made of atoms that do not have a defect level within ±0.1 ev from a mid-gap of Si.

6. The solid-state imaging device according to claim 4 ,

wherein the first layer of the non-chalcopyrite-based compound semiconductor, which is in contact with the silicon substrate, is made of a combination of at least two or more of Li, Sb, N, P, As, Bi, Te, Ti, C, Mg, Se, Cr, Ta, Ag, Pt, B, Al, Ga, In, Tl, Pd, Na, Be, Ni, Mo, Hg, K, Sn, W, Pb, O, Fe, C, Cl, Ca, and F.

7. The solid-state imaging device according to claim 6 ,

wherein the first layer of the non-chalcopyrite-based compound semiconductor, which is in contact with the silicon substrate, includes at least one of GaP, AlP, AgCl, and CaF2.

8. The solid-state imaging device according to as claim 1 ,

wherein the non-chalcopyrite-based compound semiconductor has a band gap equal to or more than that of Si.

9. The solid-state imaging device according to claim 1 ,

wherein a range of an electron affinity of the non-chalcopyrite-based compound semiconductor is between a value which is smaller than an electron affinity of the chalcopyrite-based compound semiconductor by a predetermined value and a value which is greater than an electron affinity of Si by a predetermined value.

10. The solid-state imaging device according to claim 9 ,

wherein the range of electron affinity of the non-chalcopyrite-based compound semiconductor is between a value which is smaller than an electron affinity of the chalcopyrite-based compound semiconductor by 0.25 eV and a value which is greater than an electron affinity of Si by 0.25 eV.

11. The solid-state imaging device according to claim 1 , wherein the non-chalcopyrite-based compound semiconductor also serves as the charge blocking layer.

12. The solid-state imaging device according to claim 1 ,

wherein the non-chalcopyrite-based compound semiconductor is changed stepwise in a composition of materials or impurity concentration.

13. The solid-state imaging device according to claim 1 ,

wherein the chalcopyrite-based compound semiconductor is changed stepwise in a composition of materials or impurity concentration.

14. The solid-state imaging device according to claim 1 ,

wherein the chalcopyrite-based compound semiconductor is lattice matched or pseudo-lattice matched.

15. The solid-state imaging device according to claim 1 ,

wherein the silicon substrate is formed of p-type silicon, and the charge accumulation layer is formed of n-type silicon.

16. An electronic apparatus comprising:

a solid-state imaging device including a photoelectric conversion device that includes a non-chalcopyrite-based compound semiconductor of at least one layer, which is lattice bonded or pseudo lattice bonded, and is formed on a silicon substrate, a chalcopyrite-based compound semiconductor of at least one layer which is formed on the non-chalcopyrite-based compound semiconductor, and a charge accumulation layer formed on the silicon substrate, wherein the photoelectric conversion device has a charge blocking layer at least one of between the non-chalcopyrite-based compound semiconductor and the chalcopyrite-based compound semiconductor, and between the chalcopyrite-based compound semiconductor and an upper electrode;

an optical system which allows an incident light to be incident on the solid-state imaging device; and

a signal processing circuit which processes an output signal output from the solid-state imaging device.

17. The electronic apparatus according to claim 16 ,

wherein the photoelectric conversion device further includes a charge accumulation layer formed on the silicon substrate.

18. The electronic apparatus according to claim 17 ,

wherein the electronic apparatus is a backside illumination type.

19. The electronic apparatus according to claim 17 ,

wherein the electronic apparatus has a global shutter function.

20. The electronic apparatus according to claim 17 ,

wherein the chalcopyrite-based compound semiconductor is lattice matched or pseudo lattice matched.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE INCORRECT APPLICATION NUMBER 14/572221 AND REPLACE IT WITH 14/527221 PREVIOUSLY RECORDED AT REEL: 040815 FRAME: 0649. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 27, 2022
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 058875/0887 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED ON REEL 039635 FRAME 0495. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 5, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040815/0649 →
CHANGE OF NAME Recorded Aug 9, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 039635/0495 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2014
From: NAGAHIRO, KOJI
To: SONY CORPORATION
Reel/Frame 034609/0864 →