IP Library › Granted Patent US 9,473,101
Granted Patent B2
US 9,473,101 · App. 14/617,579 · Granted Oct 18, 2016

Amplifier with integral notch filter

Inventors: Alan Ngar Loong Chan (San Jose, CA); Saihua Lin (Santa Clara, CA)
Assignee: QUALCOMM Incorporated
H03G3/3042H03F1/565H03F3/193H04B1/1036H03F3/191H03F2200/165H03F2200/213H03F2200/216H03F2200/225H03F2200/267H03F2200/294H03F2200/451H03F2200/492
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Quick Facts
Patent No.
US 9,473,101
App. No.
14/617,579
Granted
Oct 18, 2016
Kind
B2
Abstract

An amplifier is disclosed that may include a filter, such as a notch-filter, to filter an output signal provided by the amplifier. The included filter may suppress and/or reduce a gain of the amplifier for a particular range of frequencies. In one embodiment, a frequency response of the filter may be determined by one or more reactive components included within the amplifier. In at least one embodiment, the amplifier may include two or more mutual inductors to reduce the gain of the amplifier when operated at or near a predetermined frequency. In another embodiment, the amplifier may include one or more variable capacitors that may enable the frequency response of the filter to be changed and/or modified.

Claims (41)

1. A configurable amplifier, comprising:

a first resonant circuit to provide a low impedance circuit path to reduce a gain of the configurable amplifier when operating near a first frequency, the first resonant circuit comprising:

a first parasitic capacitor coupled between a drain terminal of a first transistor and a body terminal of the first transistor;

a first inductor coupled between the body terminal of the first transistor and ground; and

a second inductor to couple with the first inductor to reduce the gain of the configurable amplifier.

2. The configurable amplifier of claim 1 , wherein the first frequency is based, at least in part, on a capacitance of the first parasitic capacitor and an inductance of the first inductor.

3. The configurable amplifier of claim 1 , wherein the second inductor is coupled to a gate terminal of the first transistor.

4. The configurable amplifier of claim 1 , wherein the second inductor is to receive an input signal for the configurable amplifier.

5. The configurable amplifier of claim 1 , further comprising:

a second resonant circuit to provide a high impedance circuit path to reduce the gain of the configurable amplifier when operating near a second frequency, the second resonant circuit comprising:

a variable capacitor coupled between the body terminal of the first transistor and ground, wherein the variable capacitor is coupled in parallel with the first inductor.

6. The configurable amplifier of claim 5 , wherein the second frequency is based, at least in part, on a capacitance of the variable capacitor.

7. The configurable amplifier of claim 1 , further comprising:

a second resonant circuit to provide a low impedance circuit path to reduce the gain of the configurable amplifier when operating near a second frequency, the second resonant circuit comprising:

the first inductor; and

a second parasitic capacitor coupled between a source terminal of the first transistor and the body terminal.

8. The configurable amplifier of claim 7 , wherein the second frequency is based, at least in part, on a capacitance of the second parasitic capacitor and an inductance of the first inductor.

9. The configurable amplifier of claim 1 , further comprising:

a second transistor coupled to the drain terminal of the first transistor to operate as a cascode load for the first transistor.

10. A communication device, comprising:

a base-band processor to process communication data; and

a configurable amplifier, coupled to the base-band processor, to amplify the communication data, the configurable amplifier comprising:

a first resonant circuit to provide a low impedance circuit path to reduce a gain of the configurable amplifier when operating near a first frequency, the first resonant circuit comprising:

a first parasitic capacitor coupled between a drain terminal of a transistor and a body terminal of the transistor;

a first inductor coupled between the body terminal of the transistor and ground; and

a second inductor to couple with the first inductor to reduce the gain of the configurable amplifier.

11. The communication device of claim 10 , wherein the first frequency is based, at least in part, on a capacitance of the first parasitic capacitor and an inductance of the first inductor.

12. The communication device of claim 10 , wherein the second inductor is coupled to a gate terminal of the transistor.

13. The communication device of claim 10 , further comprising:

a second resonant circuit to provide a high impedance circuit path to reduce the gain of the configurable amplifier when operating near a second frequency, the second resonant circuit comprising:

a variable capacitor coupled between the body terminal of the transistor and ground, wherein the variable capacitor is coupled in parallel with the first inductor.

14. The communication device of claim 13 , wherein the second frequency is based, at least in part, on a capacitance of the variable capacitor.

15. The communication device of claim 10 , further comprising:

a second resonant circuit to provide a low impedance circuit path to reduce the gain of the configurable amplifier when operating near a second frequency, the second resonant circuit comprising:

the first inductor; and

a second parasitic capacitor coupled between a source terminal of the transistor and the body terminal.

16. The communication device of claim 15 , wherein the second frequency is based, at least in part, on a capacitance of the second parasitic capacitor and an inductance of the first inductor.

17. An amplifier, comprising:

a first inductor of a mutual inductor pair coupled to a gate terminal of a transistor; and

a second inductor of the mutual inductor pair coupled between a body terminal of the transistor and ground, the second inductor to reduce a gain of the amplifier.

18. The amplifier of claim 17 , wherein the second inductor is to oppose a current flow between the body terminal and ground based, at least in part, on a current carried by the first inductor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2015
From: CHAN, ALAN NGAR LOONG; LIN, SAIHUA
To: QUALCOMM INCORPORATED
Reel/Frame 034946/0328 →
Continuity (1)
Related Publication 20160233843A1 · Aug 11, 2016