Control method for inverter device, and inverter device

1. A method for controlling an inverter device, wherein the inverter device includes a first inverter capable of generating a first output voltage having a plurality of levels, a second inverter connected in parallel to the first inverter and capable of generating a second output voltage having a plurality of levels, a filter circuit that combines the first output voltage and the second output voltage and generates an output voltage having a sine waveform, and a control circuit that controls the first inverter and the second inverter to generate a first output voltage having a plurality of levels with the first inverter and generate a second output voltage having a plurality of levels with the second inverter so that the filter circuit generates an output voltage having a predetermined sine waveform, the plurality of levels of the first output voltage includes a first level, a second level, and a third level, the method comprising:

duty-controlling the first inverter at a high frequency with the control circuit to switch the first output voltage between the first level and the second level;

duty-controlling the first inverter at a high frequency with the control circuit to switch the first output voltage between the second level and the third level; and

controlling the second inverter with the control circuit to switch the second output voltage to any one of the plurality of levels,

wherein the controlling the second inverter includes duty-controlling the second inverter at a high frequency when the second inverter switches the level of the second output voltage.

2. The method according to claim 1 , comprising stopping the duty control of the first inverter that is duty-controlled at the high frequency when the second inverter is duty-controlled at a high frequency with the control circuit.

3. The method according to claim 1 , wherein each of the first and second inverters is a three-level inverter and connected to a connection point between a first capacitor and a second capacitor that are connected in series and equally divide DC voltage, the method comprising

generating the first and second output voltages having three levels using the voltage at the connection point with the first and second inverters.

4. An inverter device comprising:

a first inverter capable of generating a first output voltage having a plurality of levels;

a second inverter connected in parallel to the first inverter and capable of generating a second output voltage having a plurality of levels;

a filter circuit connected to the first inverter and the second inverter, wherein the filter circuit combines the first output voltage and the second output voltage and generates an output voltage having a sine waveform; and

a control circuit that controls the first inverter and the second inverter to generate a first output voltage having a plurality of levels with the first inverter and generate a second output voltage having a plurality of levels with the second inverter so that the filter circuit generates an output voltage having a predetermined sine waveform, wherein

the plurality of levels of the first output voltage includes a first level, a second level, and a third level,

the control circuit is configured to:

duty-controls the first inverter at a high frequency to switch the first output voltage between the first level and the second level;

duty-controls the first inverter at a high frequency to switch the first output voltage between the second level and the third level; and

control the second inverter to switch the second output voltage to any one of the plurality of levels, and

the control circuit duty-controls the second inverter at a high frequency when the second inverter switches the level of the second output voltage.

5. The inverter device according to claim 4 , wherein the control circuit stops the duty control of the first inverter that is duty-controlled at the high frequency when the second inverter is duty-controlled at a high frequency.

6. The inverter device according to claim 4 , wherein the control circuit includes

a first control mode that duty-controls the first inverter at a high frequency when the second inverter is duty-controlled at a high frequency, and

a second control mode that stops duty-controlling the first inverter when the second inverter is duty-controlled at a high frequency.

7. The inverter device according to claim 6 , comprising

a first capacitor and a second capacitor connected in series, wherein the first capacitor and the second capacitor equally divide DC voltage,

wherein the control circuit switches a control mode to one of the first control mode and the second control mode based on voltage at a connection point between the first capacitor and the second capacitor.

8. The inverter device according to claim 4 , comprising

a first capacitor and a second capacitor connected in series, wherein the first capacitor and the second capacitor equally divide DC voltage, wherein

each of the first and second inverters is a three-level inverter and connected to a connection point between the first capacitor and the second capacitor, and

the first and second inverters generate the first and second output voltages having three levels using the voltage at the connection point.

9. The inverter device according to claim 8 , wherein the control circuit starts duty-controlling the second inverter at a high frequency based on voltage at the connection point between the first capacitor and the second capacitor and stops duty controlling the first inverter when the second inverter is duty-controlled at a high frequency.

10. The inverter device according to claim 8 , wherein

each of the first and second inverters includes

a first series circuit including four series-connected switching elements, and

a second series circuit including two series-connected clamping diodes;

the four switching elements include two switching elements at an upper arm side and two switching elements at a lower arms side, and the two clamping diodes include a clamping diode at an upper arm side and a clamping diode at a lower arm side;

the upper arm side clamping diode includes a cathode terminal connected to a connection node between the two upper arm side switching elements, and the lower arm side clamping diode includes an anode terminal connected to a connection node between the two lower arm side switching elements; and

the connection node between the first capacitor and the second capacitor is connected to a connection node between the two clamping diodes, and the filter circuit is connected to a connection node between the two upper arm side switching elements and the two lower side switching elements.