Threshold voltage-tracking bias circuit for radio frequency power amplifier

1. A circuit comprising:

an amplifier transistor to receive a radio frequency (RF) input signal at a gate terminal of the amplifier transistor and to amplify the RF input signal; and

a bias circuit to generate a direct current (DC) bias voltage and including

a bias transistor having a drain terminal;

a diode having a reverse terminal coupled to the gate terminal of the amplifier transistor and a forward terminal coupled to the drain terminal of the bias transistor to pass the DC bias voltage to the gate terminal of the amplifier transistor and to level-shift the DC bias voltage at the gate terminal of the amplifier transistor to be higher than a DC voltage level at the drain terminal of the bias transistor;

a first resistor coupled between a ground potential and the forward terminal of the diode;

an electro-static discharge (ESD) resistor coupled between a gate terminal of the bias transistor and a supply terminal that supplies a negative voltage; and

a second resistor coupled between a source terminal of the bias transistor and the supply terminal.

2. The circuit of claim 1 , further comprising a bias resistor coupled in series with the diode between the gate terminal of the amplifier transistor and the drain terminal of the bias transistor.

3. A circuit comprising:

an amplifier transistor to receive a radio frequency (RF) input signal at a gate terminal of the amplifier transistor and to amplify the RF input signal; and

a bias circuit to generate a direct current (DC) bias voltage and including

a bias transistor having a drain terminal;

a first diode having a reverse terminal coupled to the gate terminal of the amplifier transistor and a forward terminal coupled to the drain terminal of the bias transistor to pass the DC bias voltage to the gate terminal of the amplifier transistor and to level-shift the DC bias voltage at the gate terminal of the amplifier transistor to be higher than a DC voltage level at the drain terminal of the bias transistor; and

a second diode having a forward terminal coupled with a node between the first diode and the gate terminal of the amplifier transistor to provide current to the first diode.

4. The circuit of claim 3 , wherein the bias circuit further comprises;

first and second resistors coupled in series with one another between the drain terminal of the bias transistor and a ground potential, wherein a reverse terminal of the second diode is coupled with a node between the first and second resistors.

5. An apparatus comprising:

a radio frequency (RF) transistor including a gate terminal, the RF transistor to receive an RF signal at the gate terminal; and

a bias circuit to provide a direct current (DC) bias voltage at the gate terminal of the RF transistor, wherein the bias circuit is to adjust the DC bias voltage based on a threshold voltage of the R F transistor, including;

a bias transistor having a drain terminal;

a diode having a forward terminal coupled to the bias transistor and a reverse terminal coupled to the gate terminal of the RF transistor to level-shift a voltage level of the DC bias voltage to reduce a variation in drain current of the RF transistor over a change in the DC bias voltage at the gate terminal of the RF transistor;

a first resistor coupled between a node and a ground potential and the forward terminal of the diode;

an electro-static discharge (ESD) resistor coupled between a gate terminal of the bias transistor and a supply terminal that supplies a negative voltage; and

a second resistor coupled between a source terminal of the bias transistor and the supply terminal.

6. The apparatus of claim 5 , further comprising a bias resistor coupled in series with the diode between the gate terminal of the RF transistor and the drain terminal of the bias transistor.

7. An apparatus comprising:

a radio frequency (RF) transistor including a gate terminal, the RF transistor to receive an RF signal at the gate terminal; and

a bias circuit to provide a direct current (DC) bias voltage at the gate terminal of the RF transistor, wherein the bias circuit is to adjust the DC bias voltage based on a threshold voltage of the RF transistor, including

a bias transistor having a drain terminal;

a first diode having a forward terminal coupled to the bias transistor and a reverse terminal coupled to the gate terminal of the RF transistor to level-shift a voltage level of the DC bias voltage to reduce a variation in drain current of the RF transistor over a change in the DC bias voltage at the gate terminal of the RF transistor;

first and second resistors coupled in series with one another between the drain terminal of the bias transistor and a ground potential; and

a second diode having a forward terminal coupled with a node between the first diode and the gate terminal of the R F transistor and a reverse terminal coupled with a node between the first and second resistors, the second diode to provide current to the first diode.

8. The apparatus of claim 5 , wherein the RF transistor is to amplify the RF signal.

9. The circuit of claim 3 , further comprising a bias resistor coupled in series with the first diode between the gate terminal of the amplifier transistor and the drain terminal of the bias transistor.

10. The apparatus of claim 7 , further comprising a bias resistor coupled in series with the first diode between the gate terminal of the RF transistor and the drain terminal of the bias transistor.