Memory buffers and modules supporting dynamic point-to-point connections
A memory module comprises a module interface having module data-group ports to communicate data as respective data groups, a command port to receive memory-access commands, a first memory device including a first device data-group port, a second memory device including a second device data-group port, and a signal buffer coupled between the module interface and each of the first and second devices. In a first mode, in response to the memory-access commands, the signal buffer communicates the data group associated with each of the first and second device data-group ports via a respective one of the module data-group ports. In a second mode, in response to the memory-access commands, the signal buffer alternatively communicates the data group associated with the first device data-group port or the data group associated with the second device data-group port via the same one of the module data-group ports.
1. A method for configuring a data width of a memory module, the memory module having memory devices and module data-group ports to communicate respective data groups, the method comprising:
sensing a value indicative of the data width;
responsive to a first value indicative of a first data width, coupling each module-data group port to a respective one of the memory devices;
responsive to a second value indicative of a second data width, alternatively coupling a subset of the module data-group ports to a first or a second subset of the memory devices; and
receiving first commands and, responsive to the first value and the first commands, issuing second commands to the memory devices or, responsive to the second value and the first commands, issuing third commands to one or the other of the first and second subsets of the memory devices.
2. The method of claim 1 , wherein alternatively coupling the subset of the module data-group ports to the first or second subset of the memory devices comprises receiving a memory address and selecting between the first and second subsets of the memory devices based on the memory address.
3. The method of claim 1 , wherein the numbers of memory devices in the first and second subsets of the memory devices are equal.
4. The method of claim 1 , wherein the first data width is a factor of two greater than the second data width.
5. The method of claim 1 , further comprising receiving a command to store the value indicative of the data width.
6. The method of claim 1 , further comprising deriving the second or third commands from the first commands.
7. The method of claim 6 , further comprising receiving an address and issuing the third commands to a selected one of the subsets of the memory devices based on the address.
8. The method of claim 7 , wherein the first command includes the address.