Pixel circuit, display substrate and display device

1. A pixel circuit comprising a control section, a light emitting diode, a high-level input terminal, a low-level input terminal and a reference terminal, in which the control section comprises a driving thin film transistor, at least one capacitors and a plurality of switching thin film transistors, a cathode of the light emitting diode is connected with the low-level input terminal, the driving thin film transistor is connected between the light emitting diode and the high-level input terminal, and a gate of the driving thin film transistor, one of the capacitors, one of the switching thin film transistors and the reference terminal are connected with each other in this order, the pixel circuit is characterized in that the reference terminal is connected with the low-level input terminal so as to discharge the capacitor connected with the gate of the driving thin film transistor in a pixel resetting stage of the pixel circuit.

2. The pixel circuit according to claim 1 , wherein the plurality of the switching thin film transistors includes a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, and a fifth thin film transistor, and the at least one capacitors include a first capacitor and a second capacitor;

the first thin film transistor is connected between the gate of the driving thin film transistor and a drain of the driving thin film transistor, a gate of the first thin film transistor is connected with a second control signal terminal;

the third thin film transistor is connected between the drain of the driving thin film transistor and an anode of the light emitting diode, a gate of the third thin film transistor is connected with a first control signal terminal;

the fifth thin film transistor is connected between the reference terminal and one end of the second capacitor, a gate of the fifth thin film transistor is connected with the second control signal terminal;

the second thin film transistor and the fourth thin film transistor are connected in series between the high-level input terminal and a data signal input terminal, a gate of the second thin film transistor is connected with the first control signal terminal, a gate of the fourth thin film transistor is connected with the second control signal terminal; and

one end of the first capacitor is connected between the second thin film transistor and the fourth thin film transistor, the other end of the first capacitor is connected to the end of the second capacitor, and the other end of the second capacitor is connected with the gate of the driving thin film transistor.

3. The pixel circuit according to claim 2 , wherein, in the pixel resetting stage of the pixel circuit, a first control signal outputted from the first control signal terminal and a second control signal outputted from the second control signal terminal are in low level;

in a data writing stage of the pixel circuit, the first control signal is in high level, the second control signal is in low level; and

in a light emitting stage of the pixel circuit, the first control signal is in low level, the second control signal is in high level.

4. A display substrate comprising a pixel circuit, characterized in that the pixel circuit is the pixel circuit according to claim 1 .

5. The display substrate according to claim 4 , wherein, in the pixel circuit, the plurality of the switching thin film transistors include a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, and a fifth thin film transistor, and the at least one capacitors include a first capacitor and a second capacitor;

the first thin film transistor is connected between the gate of the driving thin film transistor and a drain of the driving thin film transistor, a gate of the first thin film transistor is connected with a second control signal terminal;

the third thin film transistor is connected between the drain of the driving thin film transistor and an anode of the light emitting diode, a gate of the third thin film transistor is connected with a first control signal terminal;

the fifth thin film transistor is connected between the reference terminal and one end of the second capacitor, a gate of the fifth thin film transistor is connected with the second control signal terminal;

the second thin film transistor and the fourth thin film transistor are connected in series between the high-level input terminal and a data signal input terminal, a gate of the second thin film transistor is connected with the first control signal terminal, a gate of the fourth thin film transistor is connected with the second control signal terminal; and

one end of the first capacitor is connected between the second thin film transistor and the fourth thin film transistor, the other end of the first capacitor is connected to the end of the second capacitor, and the other end of the second capacitor is connected with the gate of the driving thin film transistor.

6. The display substrate according to claim 5 , wherein, in the pixel resetting stage of the pixel circuit, a first control signal outputted from the first control signal terminal and a second control signal outputted from the second control signal terminal are in low level;

in a data writing stage of the pixel circuit, the first control signal is in high level, the second control signal is in low level; and

in a light emitting stage of the pixel circuit, the first control signal is in low level, the second control signal is in high level.

7. A display device comprising a display substrate, characterized in that the display substrate is the display substrate according to claim 4 .

8. The display device according to claim 7 , wherein, in the pixel circuit of the display substrate, the plurality of the switching thin film transistors include a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, and a fifth thin film transistor, and the at least one capacitors include a first capacitor and a second capacitor;

the first thin film transistor is connected between the gate of the driving thin film transistor and a drain of the driving thin film transistor, a gate of the first thin film transistor is connected with a second control signal terminal;

the third thin film transistor is connected between the drain of the driving thin film transistor and an anode of the light emitting diode, a gate of the third thin film transistor is connected with a first control signal terminal;

the fifth thin film transistor is connected between the reference terminal and one end of the second capacitor, a gate of the fifth thin film transistor is connected with the second control signal terminal;

the second thin film transistor and the fourth thin film transistor are connected in series between the high-level input terminal and a data signal input terminal, a gate of the second thin film transistor is connected with the first control signal terminal, a gate of the fourth thin film transistor is connected with the second control signal terminal; and

one end of the first capacitor is connected between the second thin film transistor and the fourth thin film transistor, the other end of the first capacitor is connected to the end of the second capacitor, and the other end of the second capacitor is connected with the gate of the driving thin film transistor.

9. The display substrate according to claim 8 , wherein, in the pixel resetting stage of the pixel circuit, a first control signal outputted from the first control signal terminal and a second control signal outputted from the second control signal terminal are in low level;

in a data writing stage of the pixel circuit, the first control signal is in high level, the second control signal is in low level; and

in a light emitting stage of the pixel circuit, the first control signal is in low level, the second control signal is in high level.