Semiconductor device and method of fabricating the same
A semiconductor device includes a semiconductor substrate including a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate 5 structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.
1. A semiconductor device comprising:
a semiconductor substrate comprising a group III element and a group V element; and
a gate structure on the semiconductor substrate,
wherein the semiconductor substrate comprises:
a first region directly contacting a bottom surface of the gate structure; and
a second region disposed under the first region,
wherein the concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.
2. The semiconductor device of claim 1 , wherein the group III element is at least one of Ga, In and Al, and the group V element is at least one of P, As and Sb.
3. The semiconductor device of claim 1 , wherein the concentration of the group III element in the first region increases from a top surface of the first region toward a bottom surface of the first region.
4. The semiconductor device of claim 1 , wherein the top surface of the first region comprises 5% or less of oxygen atoms.
5. The semiconductor device of claim 1 , wherein the first region has a thickness of 1 to 20 nm.
6. The semiconductor device of claim 1 , wherein the gate structure comprises a gate insulating layer contacting the first region and a gate electrode disposed on the gate insulating layer.
7. The semiconductor device of claim 1 , further comprising source/drain regions disposed in the semiconductor substrate on one or more sides of the first and second regions.
8. The semiconductor device of claim 1 , further comprising a substrate disposed under the semiconductor substrate.
9. A semiconductor device comprising:
a semiconductor substrate comprising a group III element and a group V element; and
a gate structure on the semiconductor substrate,
wherein the semiconductor substrate comprises:
a first region directly contacting a bottom surface of the gate structure; and
a second region disposed under the first region,
wherein the concentration of the group V element is higher than the concentration of the group III element at the surface of the semiconductor substrate, and
wherein the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.
10. The semiconductor device of claim 9 , wherein the concentration of the group III element in the first region increases from a top surface of the first region toward a bottom surface of the first region.
11. The semiconductor device of claim 9 , wherein the concentration of the group III element in the first region is lower than that of the group V element in the first region.
12. The semiconductor device of claim 9 , wherein the group III element is at least one of Ga, In and Al, and the group V element is at least one of P, As and Sb.
13. The semiconductor device of claim 9 , further comprising spacers disposed on one or more sides of the gate structure, the first region contacting a bottom surface of the spacers.
14. A semiconductor device comprising:
a semiconductor substrate comprising a group V element and at least one of group III elements; and
a gate structure on the semiconductor substrate, wherein the semiconductor substrate comprises:
a first region contacting a bottom surface of the gate structure; and a second region disposed under the first region, wherein a total concentration of the group III elements in the first region is lower than that of a total concentration of the group V element in the first region.
15. The semiconductor device of claim 14 , wherein the concentration of the group V element is higher than the total concentration of the group III elements at the surface of the semiconductor substrate.
16. The semiconductor device of claim 14 , further comprising spacers disposed on one or more sides of the gate structure, the first region contacting a bottom surface of the spacers.
17. The semiconductor device of claim 14 , wherein the first region directly contacts the bottom surface of the gate structure.
18. The semiconductor device of claim 14 , wherein the group III elements is at least one of Ga, In and Al, and the group V element is at least one of P, As and Sb.