IP Library Granted Patent US 9,515,673
Granted Patent B2
US 9,515,673 · App. 14/995,473 · Granted Dec 6, 2016

D/A conversion circuit, oscillator, electronic apparatus, and moving object

Inventor: Shigenori Isozaki (Tatsuno, JP)
Assignee: Seiko Epson Corporation
H03M1/66H01L27/0207H01L27/0629H01L27/092H01L28/20H01L29/4916H03B5/02
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Quick Facts
Patent No.
US 9,515,673
App. No.
14/995,473
Granted
Dec 6, 2016
Kind
B2
Abstract

A D/A conversion circuit includes a plurality of resistors that are connected to each other in series, and a plurality of MOS transistors that are connected to terminals of the plurality of resistors, respectively. The plurality of resistors and the plurality of MOS transistors are formed on a semiconductor substrate. Each of the plurality of resistors is constituted by a resistive element and a plurality of contacts provided in the resistive element. The plurality of MOS transistors are disposed so that a plurality of virtual straight lines that pass through each of the plurality of contacts and are perpendicular to a longitudinal direction of the resistive element pass between gate electrodes of two adjacent MOS transistors, when seen in a plan view of the semiconductor substrate.

Claims (29)

1. A D/A conversion circuit comprising:

a plurality of resistors that are connected to each other in series; and

a plurality of MOS transistors that are connected to terminals of the plurality of resistors, respectively,

wherein the plurality of resistors and the plurality of MOS transistors are formed on a semiconductor substrate,

wherein the plurality of resistors are constituted by a resistive element and a plurality of contacts provided in the resistive element, and

wherein the plurality of MOS transistors are disposed so that a plurality of virtual straight lines that pass through each of the plurality of contacts and are perpendicular to a longitudinal direction of the resistive element pass between gate electrodes of two adjacent MOS transistors, when seen in a plan view of the semiconductor substrate.

2. The D/A conversion circuit according to claim 1 , wherein each of the plurality of resistors has a recess formed on a side facing the MOS transistor, when seen in a plan view of the semiconductor substrate.

3. The D/A conversion circuit according to claim 2 , wherein each of the plurality of resistors has the recess formed along the gate electrode of the MOS transistor opposite thereto, when seen in a plan view of the semiconductor substrate.

4. The D/A conversion circuit according to claim 1 , wherein the gate electrode of the MOS transistor is formed of polysilicon.

5. The D/A conversion circuit according to claim 1 , wherein a distance between each of the plurality of resistors and the gate electrode of the MOS transistor is equal to or less than 1 μm.

6. The D/A conversion circuit according to claim 1 ,

wherein the plurality of MOS transistors are constituted by a plurality of P-channel type MOS transistors and a plurality of N-channel type MOS transistors, and

wherein, when seen in a plan view of the semiconductor substrate, each of the plurality of P-channel type MOS transistors is disposed so as to face one end parallel to the longitudinal direction of the resistive element, and

wherein each of the plurality of N-channel type MOS transistors is disposed so as to face the other end parallel to the longitudinal direction of the resistive element.

7. The D/A conversion circuit according to claim 1 ,

wherein, when seen in a plan view of the semiconductor substrate, the resistor that faces the MOS transistor has a recess formed on a side facing the MOS transistor, and

wherein the resistor that does not face the MOS transistor faces a dummy electrode different from electrodes of the plurality of MOS transistors and has a recess formed on a side facing the dummy electrode.

8. An oscillator including the D/A conversion circuit according to claim 1 .

9. An oscillator including the D/A conversion circuit according to claim 2 .

10. An oscillator including the D/A conversion circuit according to claim 3 .

11. An oscillator including the D/A conversion circuit according to claim 4 .

12. An electronic apparatus including the D/A conversion circuit according to claim 1 .

13. An electronic apparatus including the D/A conversion circuit according to claim 2 .

14. An electronic apparatus including the D/A conversion circuit according to claim 3 .

15. An electronic apparatus including the D/A conversion circuit according to claim 4 .

16. A moving object including the D/A conversion circuit according to claim 1 .

17. A moving object including the D/A conversion circuit according to claim 2 .

18. A moving object including the D/A conversion circuit according to claim 3 .

19. A moving object including the D/A conversion circuit according to claim 4 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2016
From: ISOZAKI, SHIGENORI
To: SEIKO EPSON CORPORATION
Reel/Frame 037490/0558 →
Priority Claims (2)
JP 2015-007932 · Jan 19, 2015 · national
JP 2015-007935 · Jan 19, 2015 · national
Continuity (1)
Related Publication 20160211860A1 · Jul 21, 2016