IP Library Granted Patent US 9,530,744
Granted Patent B2
US 9,530,744 · App. 14/554,550 · Granted Dec 27, 2016

Semiconductor device and method of manufacturing the same

Inventors: Kiyoshi Oi (Nagano, JP); Satoshi Otake (Nagano, JP)
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
H01L24/13H01L23/3135H01L23/49811H01L24/16H01L24/91H01L25/105H01L24/11H01L24/73H01L24/81H01L24/83H01L2224/0345H01L2224/03464H01L2224/03912H01L2224/0401H01L2224/05023H01L2224/05124H01L2224/05147H01L2224/05166H01L2224/05568H01L2224/05647H01L2224/11462H01L2224/11472H01L2224/11849H01L2224/13017H01L2224/13082H01L2224/13083H01L2224/13111H01L2224/13147H01L2224/13155H01L2224/16238H01L2224/2919H01L2224/73204H01L2224/8183H01L2224/81191H01L2224/83097H01L2224/83192H01L2224/83862H01L2224/94H01L2924/15313H01L2924/15321
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Quick Facts
Patent No.
US 9,530,744
App. No.
14/554,550
Granted
Dec 27, 2016
Kind
B2
Abstract

A semiconductor device includes a wiring substrate including a first electrode in which a cross-sectional shape is an inverted trapezoidal shape, a semiconductor chip including a second electrode in which a cross-sectional shape is an inverted trapezoidal shape, a metal bonding material bonding a tip end of the first electrode and a tip end of the second electrode which face each other, and an underfill resin filled between the wiring substrate and the semiconductor chip, the underfill resin covering a side face of each of the first electrode and the second electrode and a side face of the metal bonding material.

Claims (15)

1. A semiconductor device, comprising:

a wiring substrate including a first electrode having a cross-sectional shape which is an inverted trapezoidal shape in which a width of a base end is narrower than a width of a tip end;

a semiconductor chip including a second electrode having a cross-sectional shape which is an inverted trapezoidal shape in which a width of a base end is narrower than a width of a tip end;

a metal bonding material bonding the tip end of the first electrode and the tip end of the second electrode which face each other; and

a first underfill resin filled between the wiring substrate and the semiconductor chip, the first underfill resin covering a side face of each of the first electrode and the second electrode and a side face of the metal bonding material.

2. The semiconductor device according to claim 1 , wherein

the metal bonding material is formed of a solder layer, and

the solder layer is formed so as not to cover the side face of each of the first electrode and the second electrode.

3. The semiconductor device according to claim 1 , wherein a height of the second electrode of the semiconductor chip is higher than a height of the first electrode of the wiring substrate.

4. The semiconductor device according to claim 1 , wherein the first electrode of the wiring substrate is a pad-shaped electrode.

5. The semiconductor device according to claim 1 , wherein the first electrode of the wiring substrate is an electrode portion defined in an extending part of a wiring layer.

6. The semiconductor device according to claim 1 , further comprising:

a bump electrode arranged on the wiring substrate located to a lateral direction of the semiconductor chip, the bump electrode having a height higher than a height position of the semiconductor chip;

an upper wiring substrate arranged above the semiconductor chip, and electrically connected to the bump electrode; and

a second underfill resin formed between the semiconductor chip and the upper wiring substrate and between the wiring substrate and the upper wiring substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2014
From: OI, KIYOSHI; OTAKE, SATOSHI
To: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Reel/Frame 034520/0787 →
Priority Claims (1)
JP 2014-023101 · Feb 10, 2014 · national
Continuity (1)
Related Publication 20150228551A1 · Aug 13, 2015