IP Library Granted Patent US 9,530,774
Granted Patent B2
US 9,530,774 · App. 14/620,596 · Granted Dec 27, 2016

Semiconductor package for III-nitride transistor stacked with diode

Inventors: Heny Lin (Irvine, CA); Jason Zhang (Monterey Park, CA); Alberto Guerra (Palos Verdes Estates, CA)
Assignee: Infineon Technologies Americas Corp.
H01L27/0727H01L23/49562H01L25/065H01L25/18H01L27/0605H01L29/2003H01L24/29H01L24/32H01L24/45H01L24/48H01L24/49H01L24/73H01L29/778H01L2224/2919H01L2224/32245H01L2224/45124H01L2224/45144H01L2224/45147H01L2224/48147H01L2224/48247H01L2224/48257H01L2224/49111H01L2224/73265H01L2924/01013H01L2924/01014H01L2924/1033H01L2924/10253H01L2924/10323H01L2924/10334H01L2924/10344H01L2924/10346H01L2924/12032H01L2924/12036H01L2924/12041H01L2924/1306H01L2924/19104H01L2924/30107
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Quick Facts
Patent No.
US 9,530,774
App. No.
14/620,596
Granted
Dec 27, 2016
Kind
B2
Abstract

One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.

Claims (27)

1. A two-terminal semiconductor package comprising:

a diode;

a III-nitride transistor;

a first terminal of said package coupled to a drain of said III-nitride transistor;

a second terminal of said package coupled to an anode of said diode;

a cathodc of said diode mechanically and electrically coupled to a source of said III-nitride transistor;

wherein said first terminal and said second terminal are coupled respectively to a first lead and a second lead of said semiconductor package;

a single conductive connector mechanically connected to said second lead, a gate of said III-nitride transistor, and said anode of said diode.

2. The semiconductor package of claim 1 , wherein said gate of said III-nitride transistor is coupled to said anode of said diode, thereby forming a cascoded switch comprising said III-nitride transistor and said diode.

3. The semiconductor package of claim 2 , wherein said a single conductive connector comprises a ribbon.

4. The semiconductor package of claim 2 , wherein said a single conductive connector comprises a clip.

5. The semiconductor package of claim 2 , wherein a said single connector comprises a wirebond.

6. The semiconductor package of claim 1 , wherein said diode is a silicon diode.

7. The semiconductor package of claim 1 , wherein said III-nitride transistor is selected from the group consisting of a GaN FET and a GaN HEMT.

8. The semiconductor package of claim 1 , wherein said III-nitride transistor comprises a depletion-mode GaN.

9. A two-terminal semiconductor package comprising:

a diode;

a III-nitride transistor;

a first terminal of said package coupled to a drain of said III-nitride transistor;

a second terminal of said package coupled to an anode of said diode;

a cathode of said diode mechanically and electrically coupled to a source of said III-nitride transistor;

wherein said first terminal and said second terminal are coupled respectively to a first lead and a second lead of said semiconductor package;

a single conductive connector mechanically connected to said second lead, a gate of said III-nitride transistor, and said anode of said diode;

wherein said a single conductive connector comprises a clip.

10. The semiconductor package of claim 9 , wherein said diode is a silicon diode.

11. The semiconductor package of claim 9 , wherein said III-nitride transistor is selected from the group consisting of a GaN FET and a GaN HEMT.

12. The semiconductor package of claim 9 , wherein said III-nitride transistor comprises a depletion-mode GaN.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Apr 13, 2016
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.; INTERNATIONAL RECTIFIER CORPORATION; INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 038463/0859 →
MERGER AND CHANGE OF NAME Recorded Mar 31, 2016
From: INTERNATIONAL RECTIFIER CORPORATION; INFINEON TECHNOLOGIES AMERICAS CORP.
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 038166/0144 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2015
From: LIN, HENY; ZHANG, JASON; GUERRA, ALBERTO
To: INTERNATIONAL RECTIFIER CORPORATION
Reel/Frame 034949/0288 →
Continuity (3)
Division 13053646 · Mar 22, 2011
Provisional Application 61448617 · Mar 2, 2011
Related Publication 20150162326A1 · Jun 11, 2015