IP Library Granted Patent US 9,550,423
Granted Patent B2
US 9,550,423 · App. 14/917,776 · Granted Jan 24, 2017

Interlock switching circuit for protecting an electrical on-board power supply

Inventor: Stefan Butzmann (Schalksmühle, DE)
Assignees: Robert Bosch GmbH; Samsung SDI Co., Ltd.
B60L3/04B60L3/0046B60L3/0069B60L3/0092G01R31/024G01R31/025B60L2240/547B60L2240/549G01R31/026G05F1/573H02H9/025
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,550,423
App. No.
14/917,776
Granted
Jan 24, 2017
Kind
B2
Abstract

An interlock switching circuit for protecting an electrical on-board power supply for an electrically drivable vehicle includes a conductor loop, a first current source, a first current mirror and a second current mirror. The first current source is configured to drive a current flowing out of an input of the first current mirror into an input of the second current mirror. The conductor loop is connected between an output of the first current mirror and an output of the second current mirror.

Claims (71)

1. An interlock switching circuit for protecting an electrical on-board power supply of an electrically drivable vehicle, comprising:

a conductor loop;

a first current source;

a first current mirror;

a second current mirror;

a third current mirror;

a first switching device; and

a second switching device,

wherein the first current source is configured to drive a current flowing out of an input of the first current mirror into an input of the second current mirror,

wherein the conductor loop is connected between an output of the first current mirror and an output of the second current mirror,

wherein the first switching device is configured to optionally switch the first current source (i) between the input of the first current mirror and the input of the second current mirror, or (ii) between the input of the first current mirror and an input of the third current mirror, and

wherein the second switching device is configured to optionally connect the output of the first current mirror to the output of the second current mirror or to an output of the third current mirror.

2. The interlock switching circuit as claimed in claim 1 , further comprising:

a regulator;

a first voltage divider; and

a second voltage divider,

wherein the first voltage divider is disposed parallel to the conductor loop between the output of the first current mirror and the output of the second current mirror,

wherein the second voltage divider is configured to provide a reference variable for the regulator, and

wherein an input of the regulator is disposed between the first voltage divider and the second voltage divider.

3. The interlock switching circuit as claimed in claim 2 , further comprising:

a second current source; and

a rectifier element,

wherein the second current source is configured to feed a current between the output of the first current mirror and the conductor loop, and

wherein an output of the regulator is also connected, via the rectifier element, between the output of the first current mirror and the conductor loop.

4. The interlock switching circuit as claimed in claim 1 , wherein the conductor loop begins between the second switching device and the output of the second current mirror and ends between the second switching device and the output of the third current mirror.

5. The interlock switching circuit as claimed in claim 1 , wherein:

the first switching device and the second switching device each comprise a first and a second transistor,

the first transistor of the first switching device is configured to connect the first current source and the input of the third current mirror to one another,

the second transistor of the first switching device is configured to connect the first current source and the input of the second current mirror to one another,

the first transistor of the second switching device is configured to connect the outputs of the first current mirror and of the second current mirror, and

the second transistor of the second switching device is configured to connect the outputs of the first current mirror and of the third current mirror.

6. The interlock switching circuit as claimed in claim 5 , wherein at least one of:

the first, the second, and the third current mirror each comprise a first and a second transistor, which are configured as bipolar transistors or as MOSFETs, and

the transistors of the first switching device and the transistors of the second switching device are configured as bipolar transistors or as MOSFETs.

7. The interlock switching circuit as claimed in claim 1 , further comprising:

a current-direction control unit configured to control the first switching device and the second switching device for selecting a current direction through the conductor loop.

8. The interlock switching circuit as claimed in claim 1 , wherein the second current mirror has a second voltage ratio and the third current mirror has a third voltage ratio, whereby the interlock switching circuit is configured to change a particular current mirrored by the second current mirror or by the third current mirror to a multiple of the current flowing through the first current source, which multiple corresponds to a particular voltage ratio.

9. The interlock switching circuit as claimed in claim 1 , wherein the first current mirror has a first voltage ratio, which is greater than at least one of a second voltage ratio of the second current mirror, and a third voltage ratio of the third current mirror.

10. The interlock switching circuit as claimed in claim 2 , wherein:

the first voltage divider has two ohmic resistances having essentially the same magnitude, and

the second voltage divider has two ohmic resistances having essentially the same magnitude.

11. The interlock switching circuit as claimed in claim 3 , wherein a current-limiting element is disposed between the output of the regulator and the conductor loop.

12. The interlock switching circuit as claimed in claim 8 , wherein the second voltage ratio and the third voltage ratio are of the same size.

13. An interlock switching circuit for protecting an electrical on-board power supply of an electrically drivable vehicle, comprising:

a conductor loop;

a first current source;

a first current mirror;

a second current mirror;

a regulator;

a first voltage divider; and

a second voltage divider,

wherein the first current source is configured to drive a current flowing out of an input of the first current mirror into an input of the second current mirror,

wherein the conductor loop is connected between an output of the first current mirror and an output of the second current mirror,

wherein the first voltage divider is disposed parallel to the conductor loop between the output of the first current mirror and the output of the second current mirror,

wherein the second voltage divider is configured to provide a reference variable for the regulator, and

wherein an input of the regulator is disposed between the first voltage divider and the second voltage divider.

14. The interlock switching circuit as claimed in claim 13 , wherein:

the first voltage divider has two ohmic resistances having essentially the same magnitude, and

the second voltage divider has two ohmic resistances having essentially the same magnitude.

15. An interlock switching circuit for protecting an electrical on-board power supply of an electrically drivable vehicle, comprising:

a conductor loop;

a first current source;

a first current mirror;

a second current mirror;

a second current source; and

a rectifier element,

wherein the first current source is configured to drive a current flowing out of an input of the first current mirror into an input of the second current mirror,

wherein the conductor loop is connected between an output of the first current mirror and an output of the second current mirror,

wherein the second current source is configured to feed a current between the output of the first current mirror and the conductor loop, and

wherein an output of the regulator is also connected, via the rectifier element, between the output of the first current mirror and the conductor loop.

16. The interlock switching circuit as claimed in claim 15 , wherein a current-limiting element is disposed between the output of the regulator and the conductor loop.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2025
From: ROBERT BOSCH GMBH
To: SAMSUNG SDI CO., LTD.
Reel/Frame 070505/0028 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2016
From: BUTZMANN, STEFAN
To: ROBERT BOSCH GMBH; SAMSUNG SDI CO., LTD.
Reel/Frame 038998/0603 →
Priority Claims (1)
DE 10 2013 219 141 · Sep 24, 2013 · national
Continuity (1)
Related Publication 20160214485A1 · Jul 28, 2016