IP Library › Granted Patent US 9,584,014
Granted Patent B2
US 9,584,014 · App. 14/478,584 · Granted Feb 28, 2017

DC-DC converter

Inventor: Takayuki Miyazaki (Tokyo, JP)
Assignee: Kabushiki Kaisha Toshiba
H02M3/156H02M2001/0032H02M2001/0048Y02B70/1491Y02B70/16
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Quick Facts
Patent No.
US 9,584,014
App. No.
14/478,584
Granted
Feb 28, 2017
Kind
B2
Abstract

According to one embodiment, a DC-DC converter includes a comparator circuit that compares a feedback voltage of an output voltage with a reference voltage and a control circuit that controls an output voltage based on an output signal of the comparator circuit. The comparator circuit performs a discrete-time operation in response to a clock signal, and a frequency of the clock signal is adjusted according to a load condition.

Claims (66)

1. A DC-DC converter comprising:

a comparator circuit that compares a feedback voltage of an output voltage with a reference voltage in response to a clock signal having a certain duration period;

a clock-signal supply unit that supplies the clock signal to the comparator circuit;

a control circuit that controls the output voltage based on an output signal of the comparator circuit, wherein

the comparator circuit performs a discrete-time operation during the certain duration period of the clock signal in response to the clock signal to output the output signal having a high level or a low level based on the comparison of the feedback voltage of the output voltage with the reference voltage, and

a frequency of the clock signal is adjusted based on a mode switching signal for switching an operation mode of a load, to which the output voltage is supplied.

2. The DC-DC converter according to claim 1 , wherein the comparator circuit includes

first and second MOS transistors that constitute a differential pair, to which the feedback voltage and the reference voltage are supplied, and

a current source circuit that supplies a bias current to the first and second MOS transistors, and

the current source circuit is turned on/off in response to the clock signal, thereby performing the discrete-time operation.

3. The DC-DC converter according to claim 1 , wherein the comparator circuit includes

a first delay cell column input with the clock signal and biased by the feedback voltage, a second delay cell column input with the clock signal and biased by the reference voltage, and

a logical circuit that outputs a pulse signal in response to output signals from the first delay cell column and the second delay cell column.

4. The DC-DC converter according to claim 3 , wherein a delay cell in the delay cell column includes

a CMOS inverter formed of a PMOS transistor and an NMOS transistor, whose gate electrodes are commonly connected and applied with the clock signal, and

a MOS transistor that supplies a bias current to the CMOS inverter, whose gate electrode is applied with the feedback voltage or the reference voltage.

5. A DC-DC converter comprising:

a comparator circuit that compares a feedback voltage of an output voltage with a reference voltage in response to a clock signal having a certain duration period;

a clock-signal supply unit that supplies the clock signal to the comparator circuit;

a control circuit that controls the output voltage based on an output signal of the comparator circuit,

a comparison unit that compares a feedback signal according to an output current with a preset threshold, wherein

the comparator circuit performs a discrete-time operation during the certain duration period of the clock signal in response to the clock signal to output the output signal having a high level or a low level based on the comparison of the feedback voltage of the output voltage with the reference voltage, and

a frequency of the clock signal is adjusted according to an output signal of the comparison unit.

6. The DC-DC converter according to claim 5 , wherein the comparator circuit includes

third and fourth MOS transistors that constitute a differential pair, to which the feedback voltage and the reference voltage are supplied, and

a current source circuit that supplies a bias current to the third and fourth MOS transistors, and the current source circuit is turned on/off in response to the clock signal, thereby performing the discrete-time operation.

7. The DC-DC converter according to claim 5 , wherein the comparator circuit includes

a third delay cell column input with the clock signal and biased by the feedback voltage, a fourth delay cell column input with the clock signal and biased by the reference voltage, and

a logical circuit that outputs a pulse signal in response to output signals from the third delay cell column and the fourth delay cell column.

8. The DC-DC converter according to claim 5 , comprising a filter that supplies the feedback voltage to the comparator circuit, wherein frequency characteristics of the filter are adjusted by an output signal of the comparison unit.

9. A DC-DC converter comprising:

a comparator circuit that compares a feedback voltage of an output voltage with a reference voltage in response to a clock signal having a certain duration period;

a control circuit that controls the output voltage based on an output signal of the comparator circuit;

a high-side switch connected between an input terminal applied with a DC input voltage and an output terminal applied with the output voltage;

an output node connected with one end of the high-side switch, the other end of the high-side switch being connected to the input terminal;

a low-side switch connected between the output node and a ground potential; and

a pulse control circuit that outputs a control signal for turning off the low-side switch a set time after a response to the drive signal, wherein

the control circuit generates a drive signal having a constant period during which the high-side switch is turned on, in response to the output signal of the comparator circuit,

the control circuit outputs a second drive signal that turns on/off the low-side switch and the set time of the pulse control circuit is adjusted according to a voltage of the output node at a time when the low-side switch is turned off, and

the comparator circuit performs a discrete-time operation during the certain duration period of the clock signal to output the output signal based on the comparison of the feedback voltage of the output voltage with the reference voltage.

10. The DC-DC converter according to claim 9 , wherein the pulse control circuit includes a timer that outputs the control signal the set time after a response to the drive signal, and a voltage detecting circuit that detects a voltage of the output node at a time when the low-side switch is turned off and that outputs an output signal according to a detection result, and the set time of the timer is changed according to the output signal of the voltage detecting circuit.

11. A DC-DC converter comprising:

a comparator circuit that compares a feedback voltage of an output voltage with a reference voltage in response to a clock signal having a certain duration period;

a control circuit that controls the output voltage based on an output signal of the comparator circuit;

a high-side switch connected between an input terminal applied with a DC input voltage and an output terminal applied with the output voltage;

an output node connected with one end of the high-side switch, the other end of the high-side switch is connected to the input terminal;

a low-side switch connected between the output node and a ground potential; and

a second comparator circuit that compares a potential of the output node with the ground potential, wherein

when the potential of the output node becomes higher than the ground potential, the control circuit is controlled by a signal output from the second comparator circuit to turn off the low-side switch,

the comparator circuit performs a discrete-time operation during the certain duration period of the clock signal to output the output signal based on the comparison of the feedback voltage of the output voltage with the reference voltage, and

the control circuit generates a drive signal having a constant period during which the high-side switch is turned on, in response to the output signal of the comparator circuit.

12. A DC-DC converter comprising:

an input terminal to which a DC input voltage is applied;

an output terminal from which an output voltage is supplied;

a switching transistor whose source-drain path is connected between the input terminal and the output terminal;

a comparator circuit that compares a feedback voltage of the output voltage with a reference voltage;

a clock-signal supply unit that supplies a clock signal that causes the comparator circuit to perform a discrete-time operation; and

a control circuit that outputs a drive signal for turning on/off the switching transistor based on an output signal of the comparator circuit, wherein

a maximum value of a switching frequency of the switching transistor is controlled to be equal to or lower than a frequency of the clock signal.

13. The DC-DC converter according to claim 12 , wherein the control circuit generates a drive signal that turns on the switching transistor for a certain time in response to the output signal of the comparator circuit.

14. The DC-DC converter according to claim 13 , further comprising:

a second switching transistor connected between the switching transistor and a ground potential and turned on/off by the drive signal from the control circuit;

an output node to which the switching transistor and the second switching transistor are connected; and

a second comparator circuit that compares a potential of the output node with the ground potential, wherein

when the potential of the output node becomes higher than the ground potential, the control circuit is controlled by a signal output from the second comparator circuit to turn off the second switching transistor.

15. The DC-DC converter according to claim 12 , wherein a frequency of the clock signal is adjusted based on a mode switching signal for switching an operation mode of a load, to which the output voltage is supplied.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2014
From: MIYAZAKI, TAKAYUKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 034007/0180 →
Priority Claims (1)
JP 2013-237246 · Nov 15, 2013 · national
Continuity (1)
Related Publication 20150137778A1 · May 21, 2015