Capacitive cross-coupling and harmonic rejection
A power amplifier of the present invention comprises a first cascode including a MOSFET and a JFET and a first capacitor electrically connected between the source and the drain of the JFET. Two such power amplifiers in parallel form a differential power amplifier. In the differential amplifier a second capacitor can be electrically connected between the source and the drain of the second JFET. Another differential power amplifier comprises a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET, and a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET. Some of these differential power amplifiers also include capacitors electrically connected between the sources and the drains of the JFETs.
1. A power amplifier comprising:
a first cascode including
a first MOSFET having a source, a drain, and a gate, and
a first JFET having a source, a drain, and a gate,
the drain of the first MOSFET being coupled to the source of the first JFET;
a first capacitor electrically connected between the source of the first JFET and the drain of the first JFET;
a second cascode including
a second MOSFET having a source, a drain, and a gate, and
a second JFET having a source, a drain, and a gate,
the drain of the second MOSFET being coupled to the source of the second JFET; and
a second capacitor electrically connected between the source of the second JFET and the drain of the second JFET.
2. The power amplifier of claim 1 wherein the gate of the first MOSFET is coupled to an input signal source and the gate of the first JFET is coupled to ground.
3. The power amplifier of claim 1 wherein the gate of the first MOSFET and the gate of the second MOSFET are both coupled to an input signal source and the gate of the first JFET and the gate of the second JFET are both coupled to ground.
4. The power amplifier of claim 1 wherein the first and second capacitors are matched.
5. The power amplifier of claim 1 further comprising
a third capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET;
a fourth capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET;
a first inductor electrically connected between ground and the source of the first MOSFET; and
a second inductor electrically connected between ground and the source of the second MOSFET.
6. The power amplifier of claim 5 wherein the first and second capacitors are matched.
7. The power amplifier of claim 6 wherein the third and fourth capacitors are matched.
8. A differential power amplifier comprising:
a first cascode including
a first MOSFET having a source, a drain, and a gate, and
a first JFET having a source, a drain, and a gate,
the drain of the first MOSFET being coupled to the source of the first JFET;
a second cascode including
a second MOSFET having a source, a drain, and a gate, and
a second JFET having a source, a drain, and a gate,
the drain of the second MOSFET being coupled to the source of the second JFET;
a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET;
a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET;
a first inductor electrically connected between ground and the source of the first MOSFET; and
a second inductor electrically connected between ground and the source of the second MOSFET.
9. The differential power amplifier of claim 8 wherein the gate of the first MOSFET and the gate of the second MOSFET are both coupled to an input signal source and the gate of the first JFET and the gate of the second JFET are both coupled to ground.
10. The differential power amplifier of claim 8 wherein the first and second capacitors are matched.