IP Library › Granted Patent US 9,640,530
Granted Patent B2
US 9,640,530 · App. 14/931,416 · Granted May 2, 2017

Semiconductor device

Inventor: Yoshinobu Sasaki (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L27/0682H01L23/66H01L24/49H01L24/48H01L25/16H01L2223/6611H01L2223/6655H01L2224/04042H01L2224/48091H01L2224/48195H01L2224/48247H01L2224/49112H01L2224/49113H01L2224/49175H01L2924/00014H01L2924/1033H01L2924/1306H01L2924/19041H01L2924/19042H01L2924/19105H01L2924/19107
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Quick Facts
Patent No.
US 9,640,530
App. No.
14/931,416
Granted
May 2, 2017
Kind
B2
Abstract

A semiconductor device includes a package, an input terminal fixed to the package, an input pre-matched substrate provided in the package, a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate, a matching circuit including a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element, a first MIM capacitor formed as part of the circuit element, and a first stabilization circuit formed as part of the circuit element to reduce oscillation, wherein a lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate.

Claims (67)

1. A semiconductor device comprising:

a package;

an input terminal fixed to the package;

an input pre-matched substrate provided in the package;

a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate;

a matching circuit comprising a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element;

a first MIM capacitor formed as part of the circuit element, the first MIM capacitor comprising a lower electrode and an upper electrode, the lower electrode having a first side formed on a surface of the input pre-matched substrate and a second side opposite the first side and facing in a direction of the upper electrode; and

a first stabilization circuit formed as part of the circuit element to reduce oscillation,

wherein the lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate and extending from the surface of the input pre-matched substrate in a direction opposite the direction of the upper electrode.

2. The semiconductor device according to claim 1 wherein the first stabilization circuit comprises:

a second MIM capacitor formed on the input pre-matched substrate to share an upper electrode with the first MIM capacitor; and

a first resistor formed on the input pre-matched substrate and connected in parallel to the second MIM capacitor.

3. The semiconductor device according to claim 1 , further comprising:

a harmonic circuit comprising a capacitor formed on the input pre-matched substrate, the harmonic circuit being a matching circuit for harmonics,

wherein the harmonic circuit connects an input of the semiconductor element and the via.

4. A semiconductor device comprising:

a package;

an input terminal fixed to the package;

an input pre-matched substrate provided in the package;

a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate;

a matching circuit comprising a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element;

a first MIM capacitor formed as part of the circuit element;

a first stabilization circuit formed as part of the circuit element to reduce oscillation,

wherein a lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate, and

wherein the first stabilization circuit comprises:

a second MIM capacitor formed on the input pre-matched substrate to share an upper electrode with the first MIM capacitor; and

a first resistor formed on the input pre-matched substrate and connected in parallel to the second MIM capacitor; and the semiconductor device further comprising:

a first pad formed on the input pre-matched substrate, the first pad having the first wire connected thereto; and

a second stabilization circuit connecting the first pad and the package,

wherein the second stabilization circuit comprises:

a second resistor formed on the input pre-matched substrate;

an external capacitor provided in the package; and

a connecting inductor.

5. The semiconductor device according to claim 4 , wherein effective frequencies of the first stabilization circuit and those of the second stabilization circuit are different from each other.

6. The semiconductor device according to claim 4 , wherein the external capacitor is formed on the input pre-matched substrate.

7. The semiconductor device according to claim 4 , further comprising:

the plurality of first MIM capacitors;

the plurality of first stabilization circuits; and

third resistors for connecting the plurality of first stabilization circuits.

8. The semiconductor device according to claim 4 , further comprising:

the plurality of first MIM capacitors;

the plurality of first stabilization circuits;

the plurality of first pads; and

a plurality of first patterns formed on the input pre-matched substrate to connect the first pads and the second resistor,

wherein lengths of the plurality of first patterns are equal.

9. The semiconductor device according to claim 8 , further comprising: a fourth resistor for connecting the plurality of first pads.

10. The semiconductor device according to claim 4 , wherein the second stabilization circuit is connected to the package through the via.

11. The semiconductor device according to claim 10 , further comprising:

the plurality of first MIM capacitors;

the plurality of first stabilization circuits;

the plurality of first pads; and

the plurality of second stabilization circuits.

12. A semiconductor device comprising:

a package;

an input terminal fixed to the package;

an input pre-matched substrate provided in the package;

a semiconductor element provided in the package and formed on a substrate different from the input pre-matched substrate;

a matching circuit comprising a circuit element formed on the input pre-matched substrate, a first wire for connecting the input terminal and the circuit element, and a second wire for connecting the circuit element and the semiconductor element;

a first MIM capacitor formed as part of the circuit element;

a first stabilization circuit formed as part of the circuit element to reduce oscillation;

wherein a lower electrode of the first MIM capacitor is connected to the package through a via provided in the input pre-matched substrate; and the semiconductor device further comprising:

an output pre-matched substrate provided in the package;

an output terminal fixed to the package;

an output wire for connecting an output of the semiconductor element and the output terminal;

an output-side circuit element formed on the output pre-matched substrate; and

a third wire for connecting an output of the semiconductor element and the output-side circuit element,

wherein the output-side circuit element is connected to the package through an output-side via formed in the output pre-matched substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2015
From: SASAKI, YOSHINOBU
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 036950/0712 →
Priority Claims (1)
JP 2015-035644 · Feb 25, 2015 · national
Continuity (1)
Related Publication 20160247798A1 · Aug 25, 2016