Electronic device and manufacturing method therefor
An electronic device includes a semiconductor substrate, an insulating material-filled layer and a vertical conductor. The semiconductor substrate has a vertical hole extending in a thickness direction thereof. The insulating material-filled layer is a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof and includes an organic insulating material or an inorganic insulating material mainly of a glass and a nanocomposite ceramic. The nanocomposite ceramic has a specific resistance of greater than 10 14 Ω·cm at room temperature and a relative permittivity of 4 to 9. The vertical conductor is a solidified metal body filled in an area surrounded by the insulating material-filled layer.
1. An electronic device comprising a semiconductor substrate having a plurality of vertical conductors, each of the vertical conductors provided with an insulating material-filled layer in a vertical hole,
the semiconductor substrate having the vertical hole extending in a thickness direction thereof,
the insulating material-filled layer being a ring-shaped layer filled in the vertical hole for covering an inner periphery thereof, and the insulating material-filled layer substantially made from a liquid glass and a nanocomposite ceramic, the liquid glass containing at least one of Na 2 O, CaO and K 2 O,
the nanocomposite ceramic having a specific resistance of greater than 10 14 Ω·cm at room temperature and a relative permittivity of 4 to 9, the nanocomposite ceramic suppressing leakage of high-frequency signal passing through the through hole,
the vertical conductors being a solidified metal body filled in an area surrounded by the insulating material-filled layer,
wherein the vertical conductors are aligned with each other at a pitch of 4 to 100 μm,
wherein each of the vertical conductors is surrounded by the insulating material-filled layer inside the vertical hole,
wherein the nanocomposite ceramic has a nanocomposite structure selected from the group consisting of: a structure where nanoparticles are dispersed in crystal grains of an element; or a structure where nanoparticles are dispersed in grain boundaries.
2. The electronic device of claim 1 , further including an electromagnetic shielding layer embedded in the insulating material-filled layer at a midpoint of a layer thickness thereof to surround the vertical conductors.
3. The electronic device of claim 1 , being a three-dimensional system-in-package (3D-SiP).
4. The electronic device of claim 1 , comprising a light-emitting diode.
5. The electronic device of claim 1 , wherein a maximum diameter D 2 of the vertical conductor is in the range of 0.5 to 25 μm.
6. The electronic device of claim 1 , wherein the insulating material-filled layer is formed by a process comprising:
filling the paste in the vertical hole;
solidifying the paste to form the solidified insulating material;
drilling the area at a center of the solidified insulating material; and
forming the vertical conductor inside the area.