IP Library › Granted Patent US 9,697,580
Granted Patent B2
US 9,697,580 · App. 14/537,589 · Granted Jul 4, 2017

Dynamic pipeline for graphics processing

Inventors: Liang Li (San Diego, CA); Andrew Evan Gruber (Arlington, MA); Guofang Jiao (San Diego, CA); Zhenyu Qi (Auburndale, MA); Gregory Steve Pitarys (Stow, MA); Scott William Nolan (Holliston, MA)
Assignee: QUALCOMM Incorporated
G06T1/20G09G5/18G09G2330/022
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Quick Facts
Patent No.
US 9,697,580
App. No.
14/537,589
Granted
Jul 4, 2017
Kind
B2
Abstract

This disclosure describes an apparatus configured to process graphics data. The apparatus may include a fixed hardware pipeline configured to execute one or more functions on a current set of graphics data. The fixed hardware pipeline may include a plurality of stages including a bypassable portion of the plurality of stages. The apparatus may further include a shortcut circuit configured to route the current set of graphics data around the bypassable portion of the plurality of stages, and a controller positioned before the bypassable portion of the plurality of stages, the controller configured to selectively route the current set of graphics data to one of the shortcut circuit or the bypassable portion of the plurality of stages.

Claims (80)

1. An apparatus configured to process graphics data, the apparatus comprising:

a fixed hardware pipeline configured to execute one or more functions on a current set of graphics data, the fixed hardware pipeline comprising a plurality of stages including a bypassable portion of the plurality of stages;

a shortcut circuit configured to route the current set of graphics data around the bypassable portion of the plurality of stages; and

a controller positioned before the bypassable portion of the plurality of stages, the controller configured to:

analyze instructions for a subsequent set of graphics data that is to be processed after the current set of graphics data; and

selectively route the current set of graphics data to one of the shortcut circuit or the bypassable portion of the plurality of stages based, at least in part, on the analysis of the instructions for the subsequent set of graphics data.

2. The apparatus of claim 1 , wherein the controller is further configured to turn off power to the bypassable portion of the plurality of stages in the case that the controller routes the current set of graphics data to the shortcut circuit.

3. The apparatus of claim 1 , wherein the bypassable portion of the plurality of stages comprises one or more bypassable stages.

4. The apparatus of claim 1 , wherein the controller is further configured to route the current set of graphics data based on a current function to be executed on the current set of graphics data.

5. The apparatus of claim 4 ,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion, and

wherein the controller is further configured to route the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion.

6. The apparatus of claim 4 , wherein the bypassable portion of the plurality of stages comprises one or more registers configured to store graphics data, the one or more registers configured to send a signal to the controller indicating whether or not the graphics data in the one or more registers is currently being processed by the bypassable portion.

7. The apparatus of claim 6 ,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion or in the case that the signal indicates that the graphics data in the one or more registers is currently being processed by the bypassable portion, and

wherein the controller is further configured to route the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion and the signal indicates that the graphics data in the one or more registers is not currently being processed by the bypassable portion.

8. The apparatus of claim 6 ,

wherein the controller is further configured to route the current set of graphics data based on the signal from the one or more registers.

9. The apparatus of claim 8 ,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the instructions for the subsequent set of graphics data do require the bypassable portion,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the signal indicates that the graphics data in the one or more registers is currently being processed by the bypassable portion, and

wherein the controller is further configured to route the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion, the instructions for the subsequent set of graphics data do not require the bypassable portion, and the signal indicates that the graphics data in the one or more registers is not currently being processed by the bypassable portion.

10. The apparatus of claim 4 , wherein the controller is further configured to determine if a subsequent set of graphics data will be processed by the bypassable portion, and wherein the controller is further configured to route the current set of graphics data based on the current function to be executed on the current set of graphics data and the determination if the subsequent set of graphics data will be processed by the bypassable portion.

11. The apparatus of claim 10 ,

wherein the controller is further configured to determine if the subsequent set of graphics data will be processed by the bypassable portion by analyzing instructions for the subsequent set of graphics data, and

wherein the controller is further configured to route the current set of graphics data based on the current function to be executed on the current set of graphics data and the analysis of the instructions for the subsequent set of graphics data.

12. The apparatus of claim 11 ,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion,

wherein the controller is further configured to route the current set of graphics data to the bypassable portion in the case that the instructions for the subsequent set of graphics data do require the bypassable portion, and

wherein the controller is further configured to route the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion and the instructions for the subsequent set of graphics data also do not require the bypassable portion.

13. A method for processing graphics data, the method comprising:

processing a current set of graphics data with a fixed hardware pipeline configured to execute one or more functions on the current set of graphics data, the fixed hardware pipeline comprising a plurality of stages including a bypassable portion of the plurality of stages, and a shortcut circuit configured to route the current set of graphics data around the bypassable portion of the plurality of stages;

analyzing instructions for a subsequent set of graphics data that is to be processed after the current set of graphics data; and

selectively routing, with a controller positioned before the bypassable portion of the plurality of stages, the current set of graphics data to one of the shortcut circuit or the bypassable portion of the plurality of stages based, at least in part, on the analysis of the instructions for the subsequent set of graphics data.

14. The method of claim 13 , further comprising:

turning off power to the bypassable portion of the plurality of stages in the case that the current set of graphics data is routed to the shortcut circuit.

15. The method of claim 13 , wherein the bypassable portion of the plurality of stages comprises one or more bypassable stages.

16. The method of claim 13 , wherein routing the current set of graphics data comprises routing the current set of graphics data based on a current function to be executed on the current set of graphics data.

17. The method of claim 16 , further comprising:

routing the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion; and

routing the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion.

18. The method of claim 16 , wherein the bypassable portion of the plurality of stages comprises one or more registers configured to store graphics data, the method further comprising:

sending, from the one or more registers, a signal to the controller indicating whether or not the graphics data in the one or more registers is currently being processed by the bypassable portion.

19. The method of claim 18 , further comprising:

routing the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion or in the case that the signal indicates that the graphics data in the one or more registers is currently being processed by the bypassable portion; and

routing the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion and the signal indicates that the graphics data in the one or more registers is not currently being processed by the bypassable portion.

20. The method of claim 18 , further comprising:

routing the current set of graphics data based on the signal from the one or more registers.

21. The method of claim 20 , further comprising:

routing the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion;

routing the current set of graphics data to the bypassable portion in the case that the instructions for the subsequent set of graphics data do require the bypassable portion;

routing the current set of graphics data to the bypassable portion in the case that the signal indicates that the graphics data in the one or more registers is currently being processed by the bypassable portion; and

routing the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion, the instructions for the subsequent set of graphics data do not require the bypassable portion, and the signal indicates that the graphics data in the one or more registers is not currently being processed by the bypassable portion.

22. The method of claim 16 , further comprising:

determining if a subsequent set of graphics data will be processed by the bypassable portion; and

routing the current set of graphics data based on the current function to be executed on the current set of graphics data and the determination if the subsequent set of graphics data will be processed by the bypassable portion.

23. The method of claim 22 , further comprising:

determining if the subsequent set of graphics data will be processed by the bypassable portion by analyzing instructions for the subsequent set of graphics data; and

routing the current set graphics data based on the current function to be executed on the current set of graphics data and the analysis of the instructions for the subsequent set of graphics data.

24. The method of claim 23 , further comprising:

routing the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion;

routing the current set of graphics data to the bypassable portion in the case that the instructions for the subsequent set of graphics data do require the bypassable portion; and

routing the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion and the instructions for the subsequent set of graphics data also do not require the bypassable portion.

25. An apparatus configured to process graphics data, the apparatus comprising:

means for processing a current set of graphics data with a fixed hardware pipeline configured to execute one or more functions on the current set of graphics data, the fixed hardware pipeline comprising a plurality of stages including a bypassable portion of the plurality of stages, and a shortcut circuit configured to route the current set of graphics data around the bypassable portion of the plurality of stages;

means for analyzing instructions for a subsequent set of graphics data that is to be processed after the current set of graphics data; and

means for selectively routing the current set of graphics data to one of the shortcut circuit or the bypassable portion of the plurality of stages based, at least in part, on the analysis of the instructions for the subsequent set of graphics data.

26. The apparatus of claim 25 , wherein the means for routing the current set of graphics data comprises means for routing the current set of graphics data based on a current function to be executed on the current set of graphics data.

27. The apparatus of claim 26 , further comprising:

means for routing the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion; and

means for routing the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion.

28. A non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a device configured to process graphics data to:

process a current set of graphics data with a fixed hardware pipeline configured to execute one or more functions on the current set of graphics data, the fixed hardware pipeline comprising a plurality of stages including a bypassable portion of the plurality of stages, and a shortcut circuit configured to route the current set of graphics data around the bypassable portion of the plurality of stages;

analyze instructions for a subsequent set of graphics data that is to be processed after the current set of graphics data; and

selectively route the current set of graphics data to one of the shortcut circuit or the bypassable portion of the plurality of stages based, at least in part, on the analysis of the instructions for the subsequent set of graphics data.

29. The non-transitory computer-readable storage medium of claim 28 , wherein the one or more processors are further configured to route the current set of graphics data based on a current function to be executed on the current set of graphics data.

30. The non-transitory computer-readable storage medium of claim 26 , wherein the one or more processors are further configured to:

route the current set of graphics data to the bypassable portion in the case that the current function requires the bypassable portion; and

route the current set of graphics data to the shortcut circuit in the case that the current function does not require the bypassable portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: LI, LIANG; GRUBER, ANDREW EVAN; JIAO, GUOFANG; QI, ZHENYU; PITARYS, GREGORY STEVE; NOLAN, SCOTT WILLIAM
To: QUALCOMM INCORPORATED
Reel/Frame 034139/0701 →
Continuity (1)
Related Publication 20160132987A1 · May 12, 2016