Self-aligned spacer for cut-last transistor fabrication
Semiconductor devices and methods of forming the same include laterally etching a dummy gate to recess the dummy gate underneath a spacer layer, such that the spacer layer overhangs the dummy gate. A sidewall of the dummy gate is nitridized. The dummy gate is etched away without removing the nitridized sidewall. A gate is formed within a boundary defined by the nitridized sidewall. A conductive contact to the gate is formed.
1. A method of forming a semiconductor device, comprising:
laterally etching a dummy gate to recess the dummy gate underneath a spacer layer, such that the spacer layer overhangs the dummy gate;
nitridizing a sidewall of the dummy gate;
etching away the dummy gate without removing the nitridized sidewall;
forming a gate within a boundary defined by the nitridized sidewall; and
forming a conductive contact to the gate.
2. The method of claim 1 , wherein the nitridized sidewall has a uniform thickness along its height.
3. The method of claim 1 , wherein the dummy gate comprises polysilicon and wherein nitridizing the sidewall converts a depth of the dummy gate to silicon nitride.
4. The method of claim 1 , further comprising forming a passivating dielectric layer over the gate before forming the conductive contact.
5. The method of claim 4 , further comprising forming a power rail in contact with the nitridized sidewall.
6. The method of claim 5 , wherein forming the power rail comprises etching a hole in the passivating dielectric.
7. The method of claim 1 , further comprising etching away a sidewall spacer from around a dummy gate before laterally etching the dummy gate.
8. The method of claim 1 , further comprising etching away a dummy gate dielectric after etching away the dummy gate.
9. The method of claim 8 , further comprising forming a gate dielectric over one or more semiconductor fins and over the nitridized sidewall after etching away the dummy gate.
10. The method of claim 9 , wherein etching away the dummy gate dielectric leaves a dummy gate dielectric remnant directly underneath the nitridized sidewall.
11. The method of claim 10 , wherein the dummy gate dielectric is formed from a different material than the gate dielectric.
12. A method of forming a semiconductor device, comprising:
etching away a sidewall spacer formed on a polysilicon dummy gate;
laterally etching the dummy gate to recess the dummy gate underneath an upper spacer layer, such that the upper spacer layer overhangs the dummy gate;
nitridizing a sidewall of the dummy gate to form a silicon nitride sidewall having a uniform thickness;
etching away the dummy gate without removing the nitridized sidewall;
etching away a dummy gate dielectric, leaving a dummy gate dielectric remnant directly underneath the nitridized sidewall;
forming a gate dielectric over one or more semiconductor fins and over the nitridized sidewall;
forming a gate within a boundary defined by the nitridized sidewall;
forming a passivating dielectric layer over the gate;
forming a conductive contact to the gate; and
forming a power rail in contact with the nitridized sidewall.
13. The method of claim 12 , wherein the dummy gate dielectric is formed from a different material than the gate dielectric.
14. The method of claim 12 , wherein forming the conductive contact and the power rail comprise etching respective holes in the passivating dielectric layer.
15. A method of forming a semiconductor device, comprising:
etching away a sidewall spacer from around a dummy gate;
laterally etching a dummy gate after etching away the sidewall spacer to recess the dummy gate underneath a spacer layer, such that the spacer layer overhangs the dummy gate;
nitridizing a sidewall of the dummy gate to form a silicon nitride sidewall having a uniform thickness;
etching away the dummy gate without removing the nitridized sidewall;
forming a gate within a boundary defined by the nitridized sidewall; and
forming a conductive contact to the gate.
16. The method of claim 15 , wherein the dummy gate comprises polysilicon and wherein nitridizing the sidewall converts a depth of the dummy gate to silicon nitride.
17. The method of claim 15 , further comprising forming a passivating dielectric layer over the gate before forming the conductive contact.
18. The method of claim 17 , further comprising forming a power rail in contact with the nitridized sidewall.
19. The method of claim 18 , wherein forming the power rail comprises etching a hole in the passivating dielectric.
20. The method of claim 15 , further comprising etching away a dummy gate dielectric after etching away the dummy gate, leaving a dummy gate dielectric remnant directly underneath the nitridized sidewall.