Semiconductor memory device and method of manufacturing the same while avoiding process damage to a variable resistance film
According to one embodiment, this semiconductor memory device includes first conducting layers, a memory layer, and second conducting layers. The first conducting layers are laminated at predetermined pitches in a first direction perpendicular to a substrate. The first conducting layers extend in a second direction parallel to the substrate. The second conducting layer extends in the first direction. A memory layer surrounds a circumference of the second conductive layer. The first conductive layers is in contact with a side surface of the second conductive layer via the memory layer. The memory cells are provided at intersections of the first conducting layers and the second conducting layer.
1. A method of manufacturing a semiconductor memory device, comprising:
forming a laminated body where interlayer insulating films and conducting layers are laminated in alternation above a semiconductor substrate;
dividing the laminated body by a plurality of first trenches whose longitudinal direction is a first direction, the first trenches being arranged in a second direction intersecting with the first direction;
forming sacrificial films in the first trenches, the sacrificial films being formed at predetermined intervals in the first direction;
forming insulating layers in the first trenches at predetermined intervals in the first direction so as to embed a void portion between the sacrificial films;
removing the sacrificial films;
forming a variable resistance layer along a lateral face of the laminated body and lateral faces of the insulating layers, the lateral face of the laminated body and the lateral faces of the insulating layers being at a position where the sacrificial films had been removed; and
forming conducting layers along lateral faces of the variable resistance layer.
2. The method of manufacturing the semiconductor memory device according to claim 1 , wherein
after the variable resistance layer is formed, the variable resistance layer formed on the bottom of the first trenches is removed, and thereafter the conducting layers are formed along the lateral faces of the variable resistance layer.
3. The method of manufacturing the semiconductor memory device according to claim 2 , wherein
a process protective film is formed along the lateral face of the variable resistance layer, and
subsequently the variable resistance layer formed on the bottom of the first trenches is removed.
4. The method of manufacturing the semiconductor memory device according to claim 3 , wherein
the process protective film is formed of a material identical to a material of the conducting layers.
5. The method of manufacturing the semiconductor memory device according to claim 1 , wherein
the sacrificial films are made of a material whose etching rate is higher than an etching rate of the conducting layers under a predetermined etching condition.
6. The method of manufacturing the semiconductor memory device according to claim 1 , wherein
forming the sacrificial films in the first trenches further includes:
embedding the sacrificial films in the first trenches; and
then removing the sacrificial films by etching at the predetermined intervals in the first direction,
and wherein
forming the insulating layers further includes
forming the insulating layers in the first trenches at a position where the sacrificial films had been etched.
7. The method of manufacturing the semiconductor memory device according to claim 1 , wherein the sacrificial films are removed by wet etching.