Method for forming metal chalcogenide thin films on a semiconductor device
In some aspects, methods of forming a metal chalcogenide thin film are provided. According to some methods, a metal chalcogenide thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase chalcogen reactant. In some aspects, methods of forming three-dimensional structure on a substrate surface are provided. In some embodiments, the method includes forming a metal chalcogenide dielectric layer between a substrate and a conductive layer. In some embodiments the method includes forming an MIS-type contact structure including a metal chalcogenide dielectric layer.
1. A method of forming a metal-insulator-semiconductor (MIS) source/drain contact structure on a source/drain region of a substrate surface, the method comprising:
providing a substrate comprising a source/drain region comprising a semiconductor surface;
depositing a metal chalcogenide thin film directly over the source/drain region; and
depositing a metal layer over the metal chalcogenide thin film to thereby form the metal-insulator-semiconductor (MIS) source/drain contact structure;
wherein the metal chalcogenide thin film comprises at least one of the following: BeS, MgS, CaS, SrS, BaS, NiS, ZnS, CdS, InS, BeSe, MgSe, CaSe, SrSe, BaSe, NiSe, ZnSe, CdSe, InSe, BeTe, MgTe, CaTe, SrTe, BaTe, NiTe, ZnTe, CdTe, and InTe; and
wherein the MIS source/drain contact structure has a Schottky barrier height (SBH) of less than 0.11 eV.
2. The method of claim 1 , wherein the metal chalcogenide thin film has a thickness between about 0.1 nm and about 5 nm.
3. The method of claim 1 , wherein the metal of the metal chalcogenide thin film comprises at least one of the following: Be, Mg, Ca, Ba, Sr, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Al, Si, Ni, Zn, Cd, Pb, In, Ga, Ge, Gd, Ta, Mo, and W.
4. The method of claim 1 , wherein the semiconductor surface comprises silicon, silicon germanium, a group III-V semiconductor, a group II-VI semiconductor, a 2D semiconductor, or combinations thereof.
5. The method of claim 1 , wherein the metal layer comprises at least one of the following: Ti, Al, Zr, Hf, V, Ta, Nb, Cr, Mo, W, Co, TiN, TiC, TiAlC, TaC, TaAlC, NbAlC, TiAl, TaAl, TaN, TaCN, WN, and TiWN.
6. The method of claim 1 , wherein depositing the metal chalcogenide thin film comprises an atomic layer deposition (ALD) process comprising alternately and sequentially contacting the semiconductor surface with a metal precursor and a chalcogen precursor.
7. A method of forming a metal-insulator-semiconductor (MIS) source/drain contact structure on a source/drain region of a substrate comprising a semiconductor surface, the method comprising:
forming a metal chalcogenide thin film on the source/drain region of the semiconductor surface by an atomic layer deposition (ALD) process comprising alternately and sequentially contacting the substrate surface with a metal precursor and a chalcogen precursor;
wherein the chalcogen precursor is selected from at least one of the following: elemental S, elemental Se, elemental Te, S plasma, Se plasma, Te plasma, H 2 S, H 2 Se, H 2 Te, (NH 4 ) 2 S, (NH 4 ) 2 Se, and (NH 4 ) 2 Te;
wherein the metal chalcogenide thin film comprises at least one of the following: BeS, MgS, CaS, SrS, BaS, NiS, ZnS, CdS, InS, BeSe, MgSe, CaSe, SrSe, BaSe, NiSe, ZnSe, CdSe, InSe, BeTe, MgTe, CaTe, SrTe, BaTe, NiTe, ZnTe, CdTe, and InTe; and
forming a metal layer over the metal chalcogenide thin film to thereby form a metal-insulator-semiconductor (MIS) source/drain contact structure,
wherein the MIS source/drain contact structure has a Schottky barrier height (SBH) of less than 0.11 eV.
8. The method of claim 7 wherein the metal precursor comprises a cyclopentadienyl ligand.
9. The method of claim 8 , wherein the metal precursor comprises Mg(Cp) 2 or Sr(Cp) 2 .
10. The method of claim 7 , further comprising subjecting the substrate surface to a pretreatment process prior to forming a metal chalcogenide thin film on the substrate surface using an ALD process, wherein the pretreatment process comprises exposing the substrate surface to at least one of the following: HCl, HF, HBr, Cl 2 , HF, H 2 S, H 2 Se, H 2 Te, (NH 4 ) 2 S, (NH 4 ) 2 Se, and (NH 4 ) 2 Te.
11. The method of claim 8 , wherein the metal chalcogenide thin film has a thickness between 0.1 nm and 5 nm.
12. A method for integrated circuit fabrication, comprising:
forming a metal chalcogenide dielectric layer directly over a source/drain region of a semiconductor substrate by alternately and sequentially contacting the substrate surface with a metal precursor and a chalcogen precursor, wherein the metal chalcogenide dielectric layer comprises at least one of the following: BeS, MgS, CaS, SrS, BaS, NiS, ZnS, CdS, InS, BeSe, MgSe, CaSe, SrSe, BaSe, NiSe, ZnSe, CdSe, InSe, BeTe, MgTe, CaTe, SrTe, BaTe, NiTe, ZnTe, CdTe, and InTe; and
forming a metal electrode over the dielectric layer to thereby form a metal-insulator-semiconductor (MIS) source/drain contact structure,
wherein a Schottky barrier height (SBH) of the MIS source/drain contact structure is less than 0.11 eV.
13. The method of claim 12 , wherein the metal chalcogenide dielectric layer comprises at least one of the following materials: MgS, SrS, MgSe, SrSe, MgTe, and SrTe.
14. The method of claim 12 , wherein the metal electrode comprises at least one of the following: Ti, Al, Zr, Hf, V, Ta, Nb, Cr, Mo, W, Co, TiN, TiC, TiAlC, TaC, TaAlC, NbAlC, TiAl, TaAl, TaN, TaCN, WN, and TiWN.
15. The method of claim 14 , wherein the metal electrode comprises titanium.
16. The method of claim 12 , wherein the source/drain region comprises silicon, silicon germanium, a group III-V semiconductor, a group II-VI semiconductor, a 2D semiconductor, or combinations thereof.
17. The method of claim 12 , wherein the source/drain region comprises germanium.
18. The method of claim 12 , wherein the source/drain region comprises n-doped germanium, and the metal electrode comprises titanium.
19. The method of claim 12 , wherein the metal precursor comprises Mg(Cp) 2 or Sr(Cp) 2 , and the chalcogen precursor comprises H 2 S, H 2 Se, or H 2 Te.
20. The method of claim 12 , wherein the metal chalcogenide dielectric layer comprises MgS or SrS.