Integrated circuit for satellite signal reception
An integrated circuit for satellite signal reception includes a position calculation part and has a volume of 9.33 mm 3 or less, and a time from measurement start to initial measurement of 120 seconds or less at a signal intensity of −162 dBm or more and −160 dBm or less.
1. An integrated circuit for satellite signal reception, comprising:
a reception circuit that receives a satellite signal from a satellite for positioning and generates a digital signal based on the satellite signal; and
a baseband processing circuit that calculates a position based on the digital signal generated by the reception circuit, wherein each of the reception circuit and the baseband processing circuit are located on the integrated circuit,
wherein the baseband processing circuit comprises, on the integrated circuit with the reception circuit,
a sample memory part that stores data corresponding to the digital signal,
a replica code generation part that generates replica code,
a correlation calculation part that performs correlation calculation between the data stored in the sample memory part and the replica code,
a correlation memory part that stores a result of the correlation calculation, and
a baseband processing part,
wherein the baseband processing part comprises
a satellite capture part that captures a position of the satellite based on the result of the correlation calculation, and
a position calculation part that calculates the position based on the data acquired from the satellite for the positioning captured by the satellite capture part,
wherein the integrated circuit has a volume of 9.33 mm 3 or less, and
wherein, when a signal intensity of the satellite signal is −162 dBm or more and −160 dBm or less, a time to first fix (TIFF) of the integrated circuit is 120 seconds or less.
2. The integrated circuit for satellite signal reception according to claim 1 , wherein, when the signal intensity of the satellite signal is −160 dBm, the TIFF is 60 seconds or less.
3. The integrated circuit for satellite signal reception according to claim 1 ,
wherein
a total capacity of the sample memory and the correlation memory is 300.9 Kbytes or less.
4. The integrated circuit for satellite signal reception according to claim 3 , wherein the correlation memory part includes 40 or more but 54 or less banks.