IP Library › Granted Patent US 9,719,189
Granted Patent B2
US 9,719,189 · App. 14/240,692 · Granted Aug 1, 2017

Process of surface treatment for wafer

Inventor: Heung Teak Bae (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
C30B23/025H01L21/02658H01L21/3065H01L29/1608
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,719,189
App. No.
14/240,692
Granted
Aug 1, 2017
Kind
B2
Abstract

Disclosed is a process of surface treatment of a substrate. The method of treating a surface of a substrate comprises preparing the substrate, and performing an etching process with respect to a surface of the substrate. The etching process comprises a step of introducing etching gas to the surface of the substrate, and the etching gas comprises a halogen compound and a silane compound.

Claims (28)

1. A process of surface treatment for a substrate, the method comprising:

preparing the substrate; and

etching a surface of the substrate,

wherein etching the surface of the substrate comprises:

forming an oxide layer on the substrate;

introducing etching as to the surface of the substrate; and

performing a dry etching or a wet etching process with respect to the surface of the substrate,

wherein the substrate comprises a silicon carbide substrate, and

wherein the etching gas comprises a halogen compound and a silane compound.

2. The process of claim 1 , wherein the halogen compound comprises hydrogen chloride (HCl).

3. The process of claim 1 , wherein the silane compound comprises at least one selected from the group consisting of SiHx (x is an integer of 1 to 4), methylchlorosilane (MTS), and tetratrichlorosilane (TCS).

4. The process of claim 1 , wherein the silane compound is introduced at a mole ratio in a range of 0.01 to 1 based on the halogen compound.

5. The process of claim 1 , wherein the etching gas is introduced at a temperature of 1100° C. to 1650° C.

6. A method of fabricating an epitaxial wafer, the method comprising:

preparing a substrate;

etching a surface of the substrate; and

growing an epitaxial layer from the substrate,

wherein etching a surface of the substrate comprises:

forming an oxide layer on the substrate;

introducing etching gas to the surface of the substrate; and

performing a dry etching or a wet etching process with respect to the surface of the substrate,

wherein the substrate comprises a silicon carbide substrate, and

wherein the etching gas comprises a halogen compound and a silane compound.

7. The method of claim 6 , wherein the halogen compound comprises hydrogen chloride (HCl).

8. The method of claim 6 , wherein the silane compound comprises at least one selected from the group consisting of SiHx (x is an integer of 1 to 4), methylchlorosilane (MTS), and tetratrichlorosilane (TCS).

9. The method of claim 6 , wherein the silane compound is introduced at a mole ratio in a range of 0.01 to 1 based on the halogen compound.

10. The method of claim 6 , wherein the etching gas is introduced at a temperature of 1100° C. to 1650° C.

11. The method of claim 6 , wherein the epitaxial layer comprises silicon carbide (SiC).

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2021
From: LG INNOTEK CO., LTD.
To: LX SEMICON CO., LTD.
Reel/Frame 057875/0011 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2014
From: BAE, HEUNG TEAK
To: LG INNOTEK CO., LTD.
Reel/Frame 032815/0585 →
Priority Claims (1)
KR 10-2011-0083296 · Aug 22, 2011 · national
Continuity (1)
Related Publication 20140290566A1 · Oct 2, 2014