IP Library › Granted Patent US 9,720,846
Granted Patent B2
US 9,720,846 · App. 14/724,318 · Granted Aug 1, 2017

Memory swap for direct memory access by a device assigned to a guest operating system

Inventors: Michael Tsirkin (Raanana, IL); Andrea Arcangeli (Imola, IT)
Assignee: Red Hat Israel, Ltd.
G06F12/1081G06F3/061G06F3/0604G06F3/0638G06F3/0673G06F9/45558G06F12/0646G06F13/28G06F2009/45579G06F2009/45583G06F2212/1016G06F2212/65
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Quick Facts
Patent No.
US 9,720,846
App. No.
14/724,318
Granted
Aug 1, 2017
Kind
B2
Abstract

A hypervisor detects a page fault associated with the request for a device assigned to a guest operating system to perform direct memory access (DMA) of a requested page of memory, invalidates a mapping in a central processing unit (CPU) page table of a guest physical address to a host physical address for a candidate page for being swapped out of host memory, checks a DMA access state of the candidate page to determine whether or not the candidate page can be swapped out from the host memory, and removes the candidate page from the host memory in response to determining that the DMA access state indicates that the candidate page can be swapped out.

Claims (62)

1. A method comprising:

detecting a page fault associated with a request for a device assigned to a guest operating system to perform direct memory access (DMA) of a requested page of memory;

invalidating a mapping in a central processing unit (CPU) page table of a guest physical address to a host physical address for a candidate page for being swapped out of host memory;

checking, by a hypervisor executing on a processing device, a DMA access state of the candidate page to determine whether or not the candidate page can be swapped out from the host memory; and

in response to determining that the DMA access state for the candidate page indicates that the candidate page can be swapped out:

removing the candidate page from the host memory; and

invalidating a mapping in an input/output memory management unit (IOMMU) page table of the guest physical address to the host physical address for the candidate page.

2. The method of claim 1 , wherein the DMA access is read access.

3. The method of claim 1 , further comprising:

determining from the DMA access state for the candidate page that the candidate page cannot be swapped out;

invalidating a mapping in the CPU page table of a guest physical address to a host physical address for another candidate page for being swapped out of the host memory; and

checking a DMA access state of the other candidate page to determine whether or not the other candidate page can be swapped out from the host memory.

4. The method of claim 1 , further comprising:

determining from the DMA access state for the candidate page that the candidate page cannot be swapped out;

receiving a notification from the guest operating system to perform a swap out operation; and

removing the candidate page from the host memory.

5. The method of claim 1 , wherein checking the DMA access state of the candidate page comprises:

reading an access state for the candidate page in a DMA state table for a virtual machine corresponding to the guest operating system, wherein the DMA state table is stored in shared memory accessible by the hypervisor.

6. The method of claim 1 , further comprising:

loading in the requested page into the host memory;

validating a mapping of the loaded page in the IOMMU page table of a guest physical address to a host physical address for the loaded page to indicate that the requested page is present in the host memory; and

validating a mapping of the loaded page in the CPU page table.

7. The method of claim 1 , wherein an entire virtual memory that is assigned to the guest operating system is allocated to the device for DMA.

8. A system comprising:

a memory;

a processing device, operatively coupled to the memory to:

detect a page fault associated with a request for a device assigned to a guest operating system to perform direct memory access (DMA) of a requested page of memory;

invalidate a mapping in a central processing unit (CPU) page table of a guest physical address to a host physical address for a candidate page for being swapped out of host memory;

check a DMA access state of the candidate page to determine whether or not the candidate page can be swapped out from the host memory; and

in response to determining that the DMA access state for the candidate page indicates that the candidate page can be swapped out:

remove the candidate page from the host memory; and

invalidate a mapping in an input/output memory management unit (IOMMU) page table of the guest physical address to the host physical address for the candidate page.

9. The system of claim 8 , wherein the DMA access is read access.

10. The system of claim 8 , wherein the processing device is further to:

determine from the DMA access state for the candidate page that the candidate page cannot be swapped out;

invalidate a mapping in the CPU page table of a guest physical address to a host physical address for another candidate page for being swapped out of the host memory; and

check a DMA access state of the other candidate page to determine whether or not the other candidate page can be swapped out from the host memory.

11. The system of claim 8 , wherein the processing device is further to:

determine from the DMA access state for the candidate page that the candidate page cannot be swapped out;

receive a notification from the guest operating system to perform a swap out operation; and

remove the candidate page from the host memory.

12. The system of claim 8 , wherein to check the DMA access state of the candidate page, the processing is device to:

read an access state for the candidate page in a DMA state table for a virtual machine corresponding to the guest operating system, wherein the DMA state table is stored in shared memory accessible by the hypervisor.

13. The system of claim 8 , wherein the processing device is further to:

load in the requested page into the host memory;

validate a mapping of the loaded page in the IOMMU page table of a guest physical address to a host physical address for the loaded page to indicate that the requested page is present in the host memory; and

validate a mapping of the loaded page in the CPU page table.

14. The system of claim 8 , wherein an entire virtual memory that is assigned to the guest operating system is allocated to the device for DMA.

15. A non-transitory computer-readable storage medium including instructions that, when executed by a processing device, cause the processing device to:

detect a direct memory access (DMA) request for a device assigned to a guest operating system to perform DMA of a page of memory;

prior to the page being accessed, set a DMA access state of a guest physical address for the requested page of memory to indicate that the requested page is to be accessed by DMA;

cause, by the processing device, a virtual central processing unit (CPU) to attempt to access the requested page of memory; and

send the DMA request to the device for the device to access the requested page of memory.

16. The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is further to:

increment a counter for each time a DMA access state is changed;

determine a threshold number of changes is satisfied by the counter; and

notify a hypervisor to perform a swap out operation based on the threshold being satisfied.

17. The non-transitory computer-readable storage medium of claim 13 , wherein the processing device is further to:

detect a DMA operation for the DMA request is complete; and

change a state in a DMA state table for a guest physical address for the page associated with the DMA operation to indicate that the page is not being accessed by DMA.

18. The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is further to:

create a DMA state table for a virtual machine corresponding to the guest operating system to monitor guest physical addresses of the virtual machine to be accessed by DMA, wherein the DMA state table is stored in shared memory and accessible by a hypervisor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2015
From: TSIRKIN, MICHAEL; ARCANGELI, ANDREA
To: RED HAT ISRAEL, LTD.
Reel/Frame 035737/0359 →
Continuity (1)
Related Publication 20160350236A1 · Dec 1, 2016