IP Library › Granted Patent US 9,721,943
Granted Patent B2
US 9,721,943 · App. 15/052,290 · Granted Aug 1, 2017

Wiring structure and electronic device including the same

Inventors: Changseok Lee (Siheung-si, KR); Keunwook Shin (Yongin-si, KR); Hyeonjin Shin (Suwon-si, KR); Seongjun Park (Seoul, KR); Hyunjae Song (Hwaseong-si, KR); Hyangsook Lee (Hwaseong-si, KR); Yeonchoo Cho (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L27/0629
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Quick Facts
Patent No.
US 9,721,943
App. No.
15/052,290
Granted
Aug 1, 2017
Kind
B2
Abstract

A wiring structure may include at least two conductive material layers and a two-dimensional layered material layer in an interface between the at least two conductive material layers. The two-dimensional layered material layer may include a grain expander layer which causes grain size of a conductive material layer which is on the two-dimensional layered material layer to be increased. Increased grain size may result in resistance of the second conductive material layer to be reduced. As a result, the total resistance of the wiring structure may be reduced. The two-dimensional layered material layer may contribute to reducing a total thickness of the wiring structure. Thus, a low-resistance and high-performance wiring structure without an increase in a thickness thereof may be implemented.

Claims (51)

1. A wiring structure comprising:

a first conductive material layer, the first conductive material layer including a metal layer;

a two-dimensional layered material layer on the metal layer; and

a second conductive material layer on the two-dimensional layered material layer, the second conductive material layer including a metal material.

2. The wiring structure of claim 1 , wherein the two-dimensional layered material layer includes one or more atom layers.

3. The wiring structure of claim 1 , wherein the two-dimensional layered material layer includes a grain expansion layer,

wherein a grain size of the second conductive material layer is expanded by the grain expansion layer.

4. The wiring structure of claim 1 , wherein the two-dimensional layered material layer includes a transition metal dichalcogenides (TMDCs)-based material or hexagonal boron nitride (h-BN).

5. The wiring structure of claim 1 , wherein the two-dimensional layered material layer includes at least one of MoS 2 , MoSe 2 , WS 2 , WSe 2 , or h-BN.

6. The wiring structure of claim 1 , wherein the two-dimensional layered material layer is transferred onto the first conductive material layer or directly grown on the first conductive material layer.

7. The wiring structure of claim 1 , wherein the metal layer includes at least one of TiN or TiSiN, and the second conductive material layer includes at least one of W, Al, or Cu.

8. The wiring structure of claim 1 , wherein the first conductive material layer further includes a polysilicon layer, and

the metal layer blocks diffusion of a doping element from the polysilicon layer.

9. The wiring structure of claim 1 , wherein the metal layer includes a material including at least one of,

a transition metal including at least one of Ni, Cu, Co, Fe, or Ru, and

at least one of TiN, W, NiSi, CoSi, CuSi, FeSi, MnSi, RuSi, RhSi, IrSi, PtSi, TiSi, TiSiN, WSi, or an alloy thereof.

10. A wiring structure comprising:

a first conductive material layer;

a grain expansion layer on the first conductive material layer, wherein the grain expansion layer includes a two-dimensional layered material of one or more atom layers; and

a second conductive material layer on the grain expansion layer, wherein a grain size of the second conductive material layer is expanded by the grain expansion layer.

11. The wiring structure of claim 10 , wherein the grain expansion layer includes at least one of a transition metal dichalcogenides (TMDCs)-based material or hexagonal boron nitride (h-BN).

12. The wiring structure of claim 10 , wherein the grain expansion layer includes at least one of MoS 2 , MoSe 2 , WS 2 , WSe 2 , or h-BN.

13. The wiring structure of claim 10 , wherein the grain expansion layer is transferred onto the first conductive material layer or directly grown on the first conductive material layer.

14. The wiring structure of claim 10 , wherein

the first conductive material layer includes a metal layer,

the grain expansion layer on the metal layer, and

the second conductive material layer includes a metal material.

15. The wiring structure of claim 14 , wherein

the metal layer includes at least one of TiN or TiSiN, and

the second conductive material layer includes at least one of W, Al, or Cu.

16. The wiring structure of claim 14 , wherein the metal layer includes a material including at least one of,

a transition metal including at least one of Ni, Cu, Co, Fe, or Ru, and

at least one of TiN, W, NiSi, CoSi, CuSi, FeSi, MnSi, RuSi, RhSi, IrSi, PtSi, TiSi, TiSiN, WSi, or an alloy thereof.

17. The wiring structure of claim 14 , wherein the first conductive material layer further includes a polysilicon layer, and

the metal layer is configured to block diffusion of a doping element from the polysilicon layer.

18. An electronic device comprising the wiring structure of claim 1 .

19. The electronic device of claim 18 , further comprising:

a plurality of elements including al least one of,

a transistor,

a capacitor, and

a resistor,

wherein the wiring structure is configured to be used in at least one of,

a connection between the plurality of elements,

at least one connection within each element of the plurality of elements,

a connection between at least two unit cells, the at least two unit cells formed of a combination of at least two elements of the plurality of elements, or

an interconnection between at least two chips, the at least two chips being are manufactured by combining at least two unit cells.

20. A wiring structure, comprising:

a first conductive material layer;

a two-dimensional layered material layer on the first conductive material layer; and

a second conductive material layer on the two-dimensional layered material layer;

wherein the two-dimensional layered material layer includes at least one of, a transition metal dichalcogenides (TMDCs)-based material, and hexagonal boron nitride (h-BN).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2016
From: LEE, CHANGSEOK; SHIN, KEUNWOOK; SHIN, HYEONJIN; PARK, SEONGJUN; SONG, HYUNJAE; LEE, HYANGSOOK; CHO, YEONCHOO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 037830/0343 →
Priority Claims (1)
KR 10-2015-0077490 · Jun 1, 2015 · national
Continuity (1)
Related Publication 20160351491A1 · Dec 1, 2016