IP Library › Granted Patent US 9,741,846
Granted Patent B2
US 9,741,846 · App. 15/039,564 · Granted Aug 22, 2017

Semiconductor device

Inventors: Hiroshi Kameoka (Kariya, JP); Shigeki Takahashi (Kariya, JP); Akira Yamada (Kariya, JP); Atsushi Kasahara (Kariya, JP)
Assignee: DENSO CORPORATION
H01L29/7824H01L21/84H01L27/0922H01L27/1203H01L29/0692H01L29/0878H01L29/1095H01L29/402H01L29/66681H01L29/42368
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Quick Facts
Patent No.
US 9,741,846
App. No.
15/039,564
Granted
Aug 22, 2017
Kind
B2
Abstract

A semiconductor device includes a lateral transistor having: a semiconductor substrate including a drift layer; a first impurity layer in the drift layer; a channel layer in the drift layer; a second impurity layer in the channel layer; a separation insulation film on the drift layer between the channel layer and the first impurity layer; a gate insulation film on a channel region between the second impurity layer and the drift layer connected with the separation insulation film; a gate electrode on the gate insulation film and the separation insulation film; a first electrode connected with the first impurity layer; a second electrode connected with the second impurity layer and the channel layer; and a field plate on the separation insulation film between the gate electrode and the first electrode and connected with the first electrode. The field plate is larger than the gate electrode in a current direction.

Claims (37)

1. A semiconductor device comprising:

a lateral transistor, wherein:

the lateral transistor includes:

a semiconductor substrate including a drift layer having a first conductivity type;

a first impurity layer having the first conductivity type or a second conductivity type and arranged in a surface portion of the drift layer;

a channel layer having the second conductivity type and arranged in another surface portion of the drift layer;

a second impurity layer having the first conductivity type, arranged in a surface portion of the channel layer, and surrounded by the channel layer;

a separation insulation film arranged on the drift layer between the channel layer and the first impurity layer;

a gate insulation film arranged on a surface of a channel region of the channel layer and connected with the separation insulation film, the channel region being arranged in another surface portion of the channel layer sandwiched between the second impurity layer and the drift layer;

a gate electrode arranged on a surface of the gate insulation film and extending from the gate insulation film to the separation insulation film;

a first electrode electrically connected with the first impurity layer;

a second electrode electrically connected with the second impurity layer and the channel layer; and

a field plate arranged on the separation insulation film between the gate electrode and the first electrode and electrically connected with the first electrode to be fixed to a potential of the first electrode;

a size of the field plate is larger than a size of the gate electrode in a direction of current flowing between the first electrode and the second electrode.

2. The semiconductor device according to claim 1 , wherein:

the field plate, the gate electrode, and the second electrode are arranged to surround a circumference of the first electrode with a center located at the first electrode; and

the size of the field plate is larger than the size of the gate electrode in a radial direction around a cell center located at the center of the first electrode.

3. The semiconductor device according to claim 1 , wherein:

the lateral transistor further includes a moisture proof film arranged on a portion between the gate electrode and the field plate, the moisture proof film having a moisture proof function for preventing entrance of moisture into the lateral transistor.

4. The semiconductor device according to claim 3 , wherein:

the lateral transistor further includes an interlayer insulation film arranged on the first impurity layer, the second impurity layer, the channel layer, the gate electrode, and the separation insulation film; and

the interlayer insulation film includes the moisture proof film.

5. The semiconductor device according to claim 4 , wherein:

the moisture proof film is a silicon nitride film.

6. The semiconductor device according to claim 3 , wherein:

the lateral transistor further includes:

a first interlayer insulation film arranged on the first impurity layer, the second impurity layer, the channel layer, the gate electrode, and the separation insulation film;

a first metal wiring layer arranged on the interlayer insulation film;

a second interlayer insulation film arranged on the first metal wiring layer; and

a second metal wiring layer arranged on the second interlayer insulation film; and

the moisture proof film is provided by a part of the second metal wiring layer.

7. The semiconductor device according to claim 3 , wherein:

the lateral transistor further includes:

a first interlayer insulation film arranged on the first impurity layer, the second impurity layer, the channel layer, the gate electrode, and the separation insulation film;

a first metal wiring layer arranged on the first interlayer insulation film; and

a second interlayer insulation film arranged on the first metal wiring layer; and

the second interlayer insulation film includes the moisture proof film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2016
From: KAMEOKA, HIROSHI; TAKAHASHI, SHIGEKI; YAMADA, AKIRA; KASAHARA, ATSUSHI
To: DENSO CORPORATION
Reel/Frame 038726/0958 →
Priority Claims (2)
JP 2013-264295 · Dec 20, 2013 · national
JP 2014-240158 · Nov 27, 2014 · national
Continuity (1)
Related Publication 20160351708A1 · Dec 1, 2016