Gaseous flow sensor and related method thereof
A gas flow sensing device, and related method of manufacturing, comprising a conductive layer encapsulated in dielectric film, suspended over a cavity to form a diaphragm. The conductive layer functions as both a heating a sensing element and is patterned to provide uniform heat distribution across the diaphragm. The device is designed to sense flow from any direction relative to the device and the design of the dielectric film and diaphragm reduces sensor drift during prolonged operation.
1. A low power electronic sensing device for use in measuring gaseous flow, said device comprising:
a dielectric layer with a first surface in communication with a flow to be measured;
a substrate in communication with a second surface of said dielectric layer, the substrate comprising silicon;
a cavity in said substrate, wherein a portion of said dielectric layer is substantially in communication with said cavity to form a diaphragm; and
a conductive layer disposed on or inside said diaphragm;
wherein the dielectric layer is adhered to the substrate using a porous silicon attachment layer.
2. The device of claim 1 , wherein said conductive layer is metallic.
3. The device of claim 1 , wherein said conductive layer is configured to heat said diaphragm in a substantially uniform manner.
4. The device of claim 1 , wherein said dielectric layer comprises polyimide.
5. The device of claim 1 , wherein said dielectric layer comprises two layers of polyimide.
6. The device of claim 1 , wherein said dielectric layer comprises two layers.
7. The device of claim 1 , wherein said substrate comprises mono-crystalline silicon.
8. The device of claim 1 , wherein said communication between said substrate and said second surface of said dielectric layer comprises a promoter.
9. The device of claim 8 , wherein said promoter comprises DUPONT VM-652.
10. The device of claim 1 , wherein said diaphragm is configured so as to have no support across its area.
11. The device of claim 1 , wherein said cavity is configured so as to have one or more ancillary structures within its space.
12. The device of claim 1 , wherein said cavity is configured so as to have no structure or material within its space.
13. The device of claim 1 , wherein the communication of said dielectric layer with said cavity comprises being suspended over said cavity.
14. The device of claim 1 , wherein said diaphragm comprises a shape that includes one of the following: circular in shape; substantially round in shape; elliptical in shape; a shape that has a single vertex; a polygonal shape with three or more vertices; or a simple, convex closed plane curve shape.
15. The device of claim 1 , wherein said conductive layer is disposed inside said diaphragm.
16. The device of claim 1 , wherein said conductive layer is disposed with layers of polyimide on both sides.
17. The device of claim 1 , wherein said conductive layer is disposed with a first dielectric layer and a second dielectric layer on opposite sides of said conductive film.
18. The device of claim 1 , wherein said conductive layer is a wire.
19. The device of claim 1 , wherein said device does not require directional calibration.
20. The device of claim 1 , wherein said device experiences low levels of drift during long periods of operation.
21. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in a radial serpentine pattern creating an arc concentric with a circumferential serpentine pattern.
22. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in a spiral-wound shape pattern.
23. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in concentric, substantially circular coils.
24. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in repeating patterns.
25. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in repeating sections.
26. The device of claim 1 , wherein said configuration of said conductive layer is patterned to section said diaphragm into two or more segments, and wherein said segments are patterned to uniformly heat said diaphragm.
27. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in a regular pattern.
28. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in a serpentine progression across the area of said diaphragm.
29. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in an irregular pattern.
30. The device of claim 1 , wherein said configuration of said conductive layer is patterned across the area of said diaphragm in any pattern which will create uniform, or substantially uniform, heating across the area of said diaphragm.
31. The device of claim 1 , wherein said shape of said diaphragm and said configuration of said conductive layer provides for said flow to be measured from any direction across the sensor irrespective of which direction said flow comes from.
32. A method for manufacturing a low power electronic sensing device for use in measuring gaseous flow, said method comprising:
providing a substrate having a first side and a second side, the substrate comprising silicon;
applying a first dielectric layer in communication with said substrate including creating an attachment layer on said first side of said substrate, said attachment layer comprising porous silicon, and applying said first dielectric layer to said attachment layer;
applying a conductive layer in communication with said first dielectric layer;
applying a second dielectric layer in communication with said first dielectric layer and said conductive layer; and
creating a cavity in said substrate in communication with said first dielectric layer to form a diaphragm.
33. The method of claim 32 , wherein said substrate comprises double-side polished silicon wafer.
34. The method of claim 32 , wherein said substrate comprises monocrystalline silicon.
35. The method of claim 32 , wherein said first dielectric layer comprises polyimide.
36. The method of claim 32 , wherein said second dielectric layer comprises polyimide.
37. The method of claim 32 , further comprises creating a first preparation layer on said first side of said substrate.
38. The method of claim 37 , further comprises removing said first preparation layer.
39. The method of claim 32 , further comprises creating a second preparation layer on said second side of said substrate.
40. The method of claim 39 , further comprises applying a photoresist layer to said second preparation layer.
41. The method of claim 40 , further comprises patterning said photoresist layer.
42. The method of claim 40 , further comprises removing said photoresist layer.
43. The method of claim 39 , further comprises patterning said second preparation layer.
44. The method of claim 32 , further comprises creating an attachment layer on said first side of said substrate.
45. The method of claim 32 , further comprises a first curing of said first dielectric layer.
46. The method of claim 45 , further comprises thermal heating of said first dielectric layer.
47. The method of claim 32 , further comprises applying a first photoresist layer to said first dielectric layer prior to the application of said conductive layer.
48. The method of claim 47 , further comprises patterning said photoresist layer prior to the application of said conductive layer.
49. The method of claim 47 , further comprises removing said photoresist layer prior to the application of said second dielectric layer so as to pattern said conductive layer.
50. The method of claim 32 , further comprises a curing of said second dielectric layer.
51. The method of claim 50 , further comprises thermal heating of said second dielectric layer.
52. The method of claim 32 , further comprises exposing portions of said conductive layer to form contact pads.
53. The method of claim 32 , wherein said communication between said first dielectric layer and said substrate comprises a promoter.
54. The method of claim 32 , wherein said communication between said first dielectric layer and said substrate comprises a mechanical attachment.
55. The method of claim 32 , wherein said communication between said first dielectric layer and said substrate comprises a chemical attachment.
56. The method of claim 32 , wherein said cavity is configured so as to have one or more ancillary structures within its space.
57. The method of claim 32 , wherein said cavity is configured so as to have no structure or material within its space.