IP Library › Granted Patent US 9,754,660
Granted Patent B2
US 9,754,660 · App. 14/946,258 · Granted Sep 5, 2017

Semiconductor device

Inventors: Dae-Jin Kwon (Seongnam-si, KR); Kang-Ill Seo (Chungcheongbuk-Do, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G11C11/419H01L27/11
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,754,660
App. No.
14/946,258
Granted
Sep 5, 2017
Kind
B2
Abstract

Provided are a semiconductor device. The semiconductor device includes an SRAM cell including a first pull-up transistor, a first pull-down transistor and a first pass transistor formed on a substrate, a first read buffer transistor connected to gate terminals of the first pull-up transistor and the first pull-down transistor, and a second read buffer transistor which shares a drain terminal with the first read buffer transistor, wherein the first read buffer transistor includes a first channel pattern extending in a first direction vertical to an upper surface of the substrate, a first gate electrode which covers a part of the first channel pattern, and a first drain pattern which does not contact the first gate electrode, and which extends in the first direction, and which is electrically connected to the first channel pattern.

Claims (33)

1. A semiconductor device comprising:

an SRAM cell including a first pull-up transistor, a first pull-down transistor and a first pass transistor disposed on a substrate;

a first read buffer transistor connected to gate terminals of the first pull-up transistor and the first pull-down transistor, the first read buffer transistor including:

a first channel pattern extending in a first direction vertical to an upper surface of the substrate;

a first gate electrode covering a part of the first channel pattern; and

a first drain pattern as a drain terminal of the first read buffer transistor, the first drain pattern spaced apart from the first gate electrode, extended in the first direction, and connected electrically to the first channel pattern; and

a second read buffer transistor having the first drain pattern as a drain terminal of the second read buffer transistor.

2. The semiconductor device of claim 1 ,

wherein the first read buffer transistor and the second read buffer transistor share the first drain pattern as the drain terminal of the first read buffer transistor and the drain terminal of the second read buffer transistor.

3. The semiconductor device of claim 1 ,

wherein the second read buffer transistor includes:

a second channel pattern which extends in the first direction and connected electrically to the first drain pattern; and

a second gate electrode covering a part of the second channel pattern.

4. The semiconductor device of claim 3 ,

wherein a length of the first gate electrode measured in the first direction and a length of the second gate electrode measured in the first direction are different from each other.

5. The semiconductor device of claim 3 ,

wherein a width of the first channel pattern and a width of the second channel pattern are different from each other.

6. The semiconductor device of claim 1 ,

wherein the first read buffer transistor is disposed at one side of the first drain pattern,

wherein the second read buffer transistor is disposed at the other side of the first drain pattern, and

wherein the first read buffer transistor and the second read buffer transistor face each other across the first drain pattern.

7. The semiconductor device of claim 6 ,

wherein the first gate electrode of the first read buffer transistor extends in a second direction intersecting the first direction, and

wherein the first read buffer transistor and the second read buffer transistor are arranged along a straight line extending in the second direction.

8. The semiconductor device of claim 1 ,

wherein the first read buffer transistor and the second read buffer transistor are disposed at one side of the first drain pattern.

9. The semiconductor device of claim 8 ,

wherein the second read buffer transistor includes:

a second channel pattern extending in the first direction;

a second gate electrode covering a part of the second channel pattern; and

a second conductive region connecting electrically the second channel pattern to the first drain pattern,

wherein the second gate electrode extends in a second direction intersecting the first direction, and

wherein the first channel pattern and the second channel pattern arranged in a third direction vertical to both the first direction and the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2015
From: KWON, DAE-JIN; SEO, KANG-ILL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 037092/0455 →
Continuity (1)
Related Publication 20170148505A1 · May 25, 2017