Power harvesting circuit and applications thereof
A power harvesting circuit a p-channel circuit, an n-channel circuit, an AC capacitance circuit, and an output capacitance circuit. The p-channel circuit includes a first diode element, a first diode voltage reduction circuit coupled to reduce a diode voltage of the first diode element, and a first start-up current circuit operably coupled to increase start-up current of the first diode element. The n-channel circuit includes a second diode element, a second diode voltage reduction circuit coupled to reduce a diode voltage of the second diode element, and a second start-up current circuit operably coupled to increase start-up current of the second diode element. The AC coupling capacitance circuit is coupled to the p-channel circuit and the n-channel circuit. The output capacitance circuit is coupled to the p-channel circuit and the n-channel circuit.
1. A power harvesting circuit comprises:
a p-channel circuit that includes:
a first diode element;
a first diode voltage reduction circuit coupled to reduce a diode voltage of the first diode element; and
a first start-up current circuit operably coupled to increase start-up current of the first diode element;
a n-channel circuit that includes:
a second diode element;
a second diode voltage reduction circuit coupled to reduce a diode voltage of the second diode element; and
a second start-up current circuit operably coupled to increase start-up current of the second diode element;
an alternating current (AC) coupling capacitance circuit coupled to the p-channel circuit and the n-channel circuit; and
an output capacitance circuit coupled to the p-channel circuit and the n-channel circuit, wherein the p-channel circuit and the n-channel circuit rectify a received radio frequency (RF) signal to produce a rectified signal and the output capacitance circuit filters the rectified signal to produce a direct current (DC) output.
2. The power harvesting circuit of claim 1 further comprises:
the first diode element including a p-channel MOSFET (metal oxide semiconductor field effect transistor); and
the second diode element including an n-channel MOSFET.
3. The power harvesting circuit of claim 1 further comprises:
the first diode element including a p-channel MOSFET (metal oxide semiconductor field effect transistor); and
the first diode voltage reduction circuit including:
a current source;
a biasing transistor; and
a capacitor, wherein a gate of the biasing transistor is couple to a gate of the p-channel MOSFET, to a first plate of the capacitor, to a first node of the current source, and to a drain of the biasing transistor, wherein a source of the bias transistor is coupled to a drain of the p-channel MOSFET and to a second plate of the capacitor, wherein a second node of the current source is coupled to a common reference voltage, and wherein the biasing transistor is a p-channel transistor.
4. The power harvesting circuit of claim 1 further comprises:
the second diode element including a n-channel MOSFET (metal oxide semiconductor field effect transistor); and
the second diode voltage reduction circuit including:
a current source;
a biasing transistor; and
a capacitor, wherein a gate of the biasing transistor is couple to a gate of the n-channel MOSFET, to a first plate of the capacitor, to a first node of the current source, and to a drain of the biasing transistor, wherein a source of the bias transistor is coupled to a drain of the n-channel MOSFET and to a second plate of the capacitor, wherein a second node of the current source is coupled to a power supply voltage, and wherein the biasing transistor is an n-channel transistor.
5. The power harvesting circuit of claim 1 further comprises:
the first start-up current circuit includes a current boost circuit coupled to the first diode voltage reduction circuit; and
the second start-up current circuit includes a native metal oxide semiconductor field effect transistor (MOSFET) coupled to the second diode element.
6. The power harvesting circuit of claim 5 , wherein the current boost circuit comprises:
a first transistor;
a second transistor; and
a capacitor, wherein gates of the first and second transistors are coupled together, to a first plate of the capacitor, and to a drain of the first transistor, wherein sources of the first and second transistors are coupled to a common reference voltage, wherein a second plate of the capacitor is coupled to a power supply voltage, and wherein a drain of the second transistor is coupled to the first diode voltage reduction circuit.
7. The power harvesting circuit of claim 1 comprises:
a second p-channel circuit that includes:
a third diode element;
a third diode voltage reduction circuit coupled to reduce a diode voltage of the third diode element; and
a third start-up current circuit operably coupled to increase start-up current of the third diode element;
a second n-channel circuit that includes:
a fourth diode element;
a fourth diode voltage reduction circuit coupled to reduce a diode voltage of the fourth diode element; and
a fourth start-up current circuit operably coupled to increase start-up current of the fourth diode element; and
a second AC coupling capacitance circuit coupled to the second p-channel circuit and the second n-channel circuit; and
a second output capacitance circuit coupled to the second p-channel circuit and the second n-channel circuit, wherein the second p-channel circuit and the second n-channel circuit rectify the received RF signal to produce a second rectified signal and the output capacitance circuit filters the rectified signal to produce a second DC output.
8. A power harvesting circuit comprises:
a first p-channel circuit that includes:
a first diode element;
a first diode voltage reduction circuit coupled to reduce a diode voltage of the first diode element; and
a first start-up current circuit operably coupled to increase start-up current of the first diode element;
a n-channel circuit that includes:
a second diode element;
a second diode voltage reduction circuit coupled to reduce a diode voltage of the second diode element; and
a second start-up current circuit operably coupled to increase start-up current of the second diode element;
a second p-channel circuit that includes:
a third diode element;
a third diode voltage reduction circuit coupled to reduce a diode voltage of the third diode element; and
a third start-up current circuit operably coupled to increase start-up current of the third diode element;
a first capacitance circuit;
a second capacitance circuit; and
a third capacitance circuit, wherein the first capacitance circuit is coupled to a first leg of a received radio frequency (RF) signal and to the first p-channel circuit, wherein the first p-channel circuit is further coupled to the second capacitor circuit and to the n-channel circuit, wherein the n-channel circuit is further coupled to the first capacitance circuit and to the second p-channel circuit, wherein the second p-channel circuit is further coupled to the third capacitance circuit to provide an output voltage, and wherein the second and third capacitance circuits are further coupled to a second leg of the RF signal.
9. The power harvesting circuit of claim 8 further comprises:
the first diode element including a first p-channel MOSFET (metal oxide semiconductor field effect transistor);
the second diode element including an n-channel MOSFET; and
the third diode element including a second p-channel MOSFET.
10. The power harvesting circuit of claim 8 further comprises:
the first diode element including a p-channel MOSFET (metal oxide semiconductor field effect transistor); and
the first diode voltage reduction circuit including:
a current source;
a biasing transistor; and
a capacitor, wherein a gate of the biasing transistor is couple to a gate of the p-channel MOSFET, to a first plate of the capacitor, to a first node of the current source, and to a drain of the biasing transistor, wherein a source of the bias transistor is coupled to a drain of the p-channel MOSFET and to a second plate of the capacitor, wherein a second node of the current source is coupled to a common reference voltage, and wherein the biasing transistor is a p-channel transistor.
11. The power harvesting circuit of claim 8 further comprises:
the second diode element including a n-channel MOSFET (metal oxide semiconductor field effect transistor); and
the second diode voltage reduction circuit including:
a current source;
a biasing transistor; and
a capacitor, wherein a gate of the biasing transistor is couple to a gate of the n-channel MOSFET, to a first plate of the capacitor, to a first node of the current source, and to a drain of the biasing transistor, wherein a source of the bias transistor is coupled to a drain of the n-channel MOSFET and to a second plate of the capacitor, wherein a second node of the current source is coupled to a power supply voltage, and wherein the biasing transistor is an n-channel transistor.
12. The power harvesting circuit of claim 8 further comprises:
the third diode element including a p-channel MOSFET (metal oxide semiconductor field effect transistor); and
the third diode voltage reduction circuit including:
a current source;
a biasing transistor; and
a capacitor, wherein a gate of the biasing transistor is couple to a gate of the p-channel MOSFET, to a first plate of the capacitor, to a first node of the current source, and to a drain of the biasing transistor, wherein a source of the bias transistor is coupled to a source of the p-channel MOSFET and to a second plate of the capacitor, wherein a second node of the current source is coupled to a common reference voltage, and wherein the biasing transistor is a p-channel transistor.
13. The power harvesting circuit of claim 8 further comprises:
the first start-up current circuit includes a first current boost circuit coupled to the first diode voltage reduction circuit;
the second start-up current circuit includes a native metal oxide semiconductor field effect transistor (MOSFET) coupled to the second diode element; and
the third start-up current circuit includes a second current boost circuit coupled to the third diode voltage reduction circuit.
14. The power harvesting circuit of claim 13 , wherein each of the first and second current boost circuits comprises:
a first transistor;
a second transistor; and
a capacitor, wherein gates of the first and second transistors are coupled together, to a first plate of the capacitor, and to a drain of the first transistor, wherein sources of the first and second transistors are coupled to a common reference voltage, wherein a second plate of the capacitor is coupled to a power supply voltage, and wherein a drain of the second transistor is coupled to the first diode voltage reduction circuit.
15. The power harvesting circuit of claim 8 further comprises:
a third p-channel circuit that includes:
a fourth diode element;
a fourth diode voltage reduction circuit coupled to reduce a diode voltage of the fourth diode element; and
a fourth start-up current circuit operably coupled to increase start-up current of the fourth diode element;
a second n-channel circuit that includes:
a fifth diode element;
a fifth diode voltage reduction circuit coupled to reduce a diode voltage of the fifth diode element; and
a fifth start-up current circuit operably coupled to increase start-up current of the fifth diode element;
a third n-channel circuit that includes:
a sixth diode element;
a sixth diode voltage reduction circuit coupled to reduce a diode voltage of the sixth diode element; and
a sixth start-up current circuit operably coupled to increase start-up current of the sixth diode element;
a fourth capacitance circuit;
a fifth capacitance circuit; and
a sixth capacitance circuit, wherein the fourth capacitance circuit is coupled to the first leg of the received RF signal and to the second n-channel circuit, wherein the second n-channel circuit is further coupled to the fifth capacitor circuit and to the third p-channel circuit, wherein the third p-channel circuit is further coupled to the fourth capacitance circuit and to the third n-channel circuit, wherein the third n-channel circuit is further coupled to the sixth capacitance circuit to provide a second output voltage, and wherein the fifth and sixth capacitance circuits are further coupled to the second leg of the RF signal.
16. A wireless device comprises:
an antenna structure operable to receive a radio frequency (RF) signal;
a power harvesting circuit including:
a p-channel circuit that includes:
a first diode element;
a first diode voltage reduction circuit coupled to reduce a diode voltage of the first diode element; and
a first start-up current circuit operably coupled to increase start-up current of the first diode element;
a n-channel circuit that includes:
a second diode element;
a second diode voltage reduction circuit coupled to reduce a diode voltage of the second diode element; and
a second start-up current circuit operably coupled to increase start-up current of the second diode element;
a first capacitance circuit coupled to the p-channel circuit and the n-channel circuit; and
a second capacitance circuit coupled to the p-channel circuit and the n-channel circuit;
a processing module;
memory;
a transmitter; and
a receiver, wherein the processing module, the memory, the transmitter, and the receiver are powered by a supply voltage.
17. The wireless device of claim 16 , wherein the power harvesting circuit further comprises:
a second p-channel circuit that includes:
a third diode element;
a third diode voltage reduction circuit coupled to reduce a diode voltage of the third diode element; and
a third start-up current circuit operably coupled to increase start-up current of the third diode element; and
a third capacitance circuit coupled to the second p-channel circuit, wherein the second p-channel circuit is further coupled to the n-channel circuit and the first capacitance circuit.
18. The wireless device of claim 17 , wherein the power harvesting circuit further comprises:
a third p-channel circuit that includes:
a fourth diode element;
a fourth diode voltage reduction circuit coupled to reduce a diode voltage of the fourth diode element; and
a fourth start-up current circuit operably coupled to increase start-up current of the fourth diode element;
a second n-channel circuit that includes:
a fifth diode element;
a fifth diode voltage reduction circuit coupled to reduce a diode voltage of the fifth diode element; and
a fifth start-up current circuit operably coupled to increase start-up current of the fifth diode element;
a third n-channel circuit that includes:
a sixth diode element;
a sixth diode voltage reduction circuit coupled to reduce a diode voltage of the sixth diode element; and
a sixth start-up current circuit operably coupled to increase start-up current of the sixth diode element;
a fourth capacitance circuit;
a fifth capacitance circuit; and
a sixth capacitance circuit, wherein the fourth capacitance circuit is coupled to the first leg of the received RF signal and to the second n-channel circuit, wherein the second n-channel circuit is further coupled to the fifth capacitor circuit and to the third p-channel circuit, wherein the third p-channel circuit is further coupled to the fourth capacitance circuit and to the third n-channel circuit, wherein the third n-channel circuit is further coupled to the sixth capacitance circuit to provide a second output voltage, and wherein the fifth and sixth capacitance circuits are further coupled to the second leg of the RF signal.
19. The wireless device of claim 16 , wherein the power harvesting circuit further comprises:
a second p-channel circuit that includes:
a third diode element;
a third diode voltage reduction circuit coupled to reduce a diode voltage of the third diode element; and
a third start-up current circuit operably coupled to increase start-up current of the third diode element;
a second n-channel circuit that includes:
a fourth diode element;
a fourth diode voltage reduction circuit coupled to reduce a diode voltage of the fourth diode element; and
a fourth start-up current circuit operably coupled to increase start-up current of the fourth diode element; and
a third capacitance circuit coupled to the second p-channel circuit and the second n-channel circuit; and
a fourth capacitance circuit coupled to the second p-channel circuit and the second n-channel circuit, wherein the second p-channel circuit and the second n-channel circuit rectify the received RF signal to produce a second rectified signal and the fourth capacitance circuit filters the rectified signal to produce a second DC output.