Multilayer circuit board and method for manufacturing the same

1. A multilayer circuit board adapted for mounting and heat dissipation of at least one semiconductor chip and comprising:

a ceramic substrate;

a first patterned conductive layer that is stacked on said ceramic substrate along a stacking direction, said first patterned conductive layer having a first circuit pattern and a first submount pattern, said first submount pattern including one or more first pads;

a second patterned conductive layer that is stacked on said first patterned conductive layer, said second patterned conductive layer having a second circuit pattern which is connected to said first circuit pattern, and a second submount pattern which is connected to and at least partially overlaps said first submount pattern along the stacking direction, said second submount pattern including one or more second pads;

an insulating layer stacked on said ceramic substrate and disposed among said first and second circuit patterns and said first and second submount patterns, such that a top surface of said second patterned conductive layer is exposed from said insulating layer; and

a third patterned conductive layer that is stacked on said insulating layer and said top surface of said second patterned conductive layer, said third patterned conductive layer having a third circuit pattern which is connected to said second circuit pattern, and a third submount pattern which is connected to and at least partially overlaps said second submount pattern along the stacking direction and which is adapted for mounting of the semiconductor chip thereon, said third submount pattern including one or more third pads;

wherein said second circuit pattern has a plurality of interconnections interconnecting said first circuit pattern and said third circuit pattern,

and

wherein at least said first, second and third submount patterns constitute a submount structure adapted for mounting and heat dissipation of the at least one semiconductor chip, said submount structure having at least one submount block which includes a corresponding one of said one or more first pads, a corresponding one of said one or more second pads, and a corresponding one of said one or more third pads, said first, second, and third pads of each of said at least one submount block being stacked one above another along the stacking direction such that said insulating layer steers clear of stacking of said first, second, and third pads along the stacking direction.

2. The multilayer circuit board as claimed in claim 1 , further comprising a first seed layer sandwiched between said first patterned conductive layer and said ceramic substrate, and a second seed layer sandwiched between said third patterned conductive layer and said insulating layer.

3. The multilayer circuit board as claimed in claim 1 , further comprising a surface finish layer formed on said third patterned conductive layer, wherein said surface finish layer includes at least two metal sub-layers, each of which is made from a different metallic material selected from the group consisting of Ni, Au, Ag, and Pd.

4. The multilayer circuit board as claimed in claim 1 , wherein the submount structure is directly formed on and contacts the ceramic substrate.

5. The multilayer circuit board as claimed in claim 1 , wherein the submount structure is made from metal.