IP Library › Granted Patent US 9,812,529
Granted Patent B2
US 9,812,529 · App. 15/048,348 · Granted Nov 7, 2017

Semiconductor device and method for manufacturing the same

Inventors: Teruyuki Ohashi (Kawasaki, JP); Tatsuo Shimizu (Shinagawa, JP); Ryosuke Iijima (Setagaya, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L29/1608H01L21/045H01L21/049H01L21/26506H01L29/167H01L29/34H01L29/4916H01L29/51H01L29/518H01L29/66068H01L29/7395H01L21/324
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Quick Facts
Patent No.
US 9,812,529
App. No.
15/048,348
Granted
Nov 7, 2017
Kind
B2
Abstract

A semiconductor device of an embodiment includes a SiC layer, a gate electrode, a gate insulating layer provided between the SiC layer and the gate electrode, and a first region provided between the SiC layer and the gate insulating layer and having a peak of nitrogen (N) concentration distribution and a peak of fluorine (F) concentration distribution.

Claims (35)

1. A semiconductor device comprising:

a SiC layer;

a gate electrode; and

a gate insulating layer provided between the SiC layer and the gate electrode,

wherein a peak of nitrogen (N) concentration distribution and a peak of fluorine (F) concentration distribution exist substantially at an interface between the SiC layer and the gate insulatinu film.

2. The device according to claim 1 , wherein

a maximum concentration of the peak of the nitrogen concentration distribution is 1×10 19 cm −3 or more, and

a maximum concentration of the peak of the fluorine concentration distribution is 1×10 18 cm −3 or more.

3. The device according to claim 1 , wherein

a full width at half maximum of the peak of the nitrogen concentration and the peak of the fluorine concentration distribution is 20 nm or less.

4. The device according to claim 1 , wherein

a maximum concentration of the peak of the nitrogen concentration distribution is 1×10 20 cm −3 or more, and

a maximum concentration of the peak of the fluorine concentration distribution is 5×10 18 cm −3 or more.

5. The device according to claim 1 , wherein the gate insulating layer is a silicon oxide film.

6. The device according to claim 1 , wherein the gate electrode is polycrystalline silicon including an n-type impurity or a p-type impurity.

7. The device according to claim 6 , further comprising a second region provided between the gate insulating layer and the gate electrode, the second region having a peak of the fluorine (F) concentration distribution.

8. The device according to claim 1 ,

wherein fluorine atoms are bonded to silicon atoms bonded to carbon atoms, and nitrogen atoms at the interface are bonded to carbon atoms.

9. A semiconductor device comprising:

a SiC layer;

a gate electrode;

a gate insulating layer provided between the SiC layer and the gate electrode; and

a first region provided between the SiC layer and the gate insulating layer, the first region having a peak of nitrogen (N) concentration distribution and a peak of fluorine (F) concentration distribution,

wherein fluorine atoms in the first region are bonded to silicon atoms bonded to carbon atoms, and nitrogen atoms in the first region are bonded to carbon atoms.

10. The device according to claim 9 , wherein

a maximum concentration of the peak of the nitrogen concentration distribution in the first region is 1×10 19 cm −3 or more, and

a maximum concentration of the peak of the fluorine concentration distribution in the first region is 1×10 18 cm −3 or more.

11. The device according to claim 9 , wherein

a full width at half maximum of the peak of the nitrogen concentration distribution in the first region and the peak of the fluorine concentration distribution in the first region is 20 nm or less.

12. The device according to claim 9 , wherein

a maximum concentration of the peak of the nitrogen concentration distribution in the first region is 1×10 20 cm −3 or more, and

a maximum concentration of the peak of the fluorine concentration distribution in the first region is 5×10 18 cm −3 or more.

13. The device according to claim 9 , wherein the gate insulating layer is a silicon oxide film.

14. The device according to claim 9 , wherein the gate electrode is polycrystalline silicon including an n-type impurity or a p-type impurity.

15. The device according to claim 14 , further comprising a second region provided between the gate insulating layer and the gate electrode, the second region having a peak of the fluorine (F) concentration distribution.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2016
From: OHASHI, TERUYUKI; SHIMIZU, TATSUO; IIJIMA, RYOSUKE
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 037778/0239 →
Priority Claims (1)
JP 2015-033596 · Feb 24, 2015 · national
Continuity (1)
Related Publication 20160247884A1 · Aug 25, 2016