High-performance radiation detectors and methods of fabricating thereof

1. A method for fabricating a radiation detector, the method comprising:

mechanically polishing first and second surfaces of a semiconductor wafer using a polishing sequence including a plurality of polishing steps, wherein a last polishing step of the polishing sequence includes polishing with a slurry having a grain size smaller than 0.1 μm to form polished first and second surfaces;

growing a first passivation oxide layer over the polished first surface and a second passivation oxide layer over the polished second surface, respectively;

forming patterned metal contacts on top of the first passivation oxide layer, wherein the patterned metal contacts comprise a pattern of pixel anodes;

forming a monolithic, segmented or pixelated cathode electrode on the second passivation oxide layer;

depositing an aluminum nitride (AlN) encapsulating layer over the first passivation oxide layer and the patterned metal contacts;

forming openings in the AlN encapsulating layer coinciding with the patterned metal contacts, wherein a lateral dimension of the openings is narrower than a lateral dimension of the pixel anodes;

forming a conductive material in the openings in contact with the patterned metal contacts, and attaching the radiation detector to a carrier;

wherein forming the openings in the AlN encapsulating layer comprises:

forming a lift-off mask pattern on the patterned metal contacts such that edge portions of the pixilated anodes are exposed by the photoresist pattern;

depositing the AlN encapsulating layer over the first passivation oxide layer in spaces between the pixel anodes, over the edge portion of the pixel anodes and over the lift-off mask pattern; and

lifting-off the lift-off mask pattern and portions of the AlN layer encapsulating layer located over the lift-off pattern to form the openings in the AlN layer encapsulating layer.

2. The method of claim 1 , wherein the semiconductor wafer is one of an N-Type semiconductor, a P-Type semiconductor or intrinsic semiconductor.

3. The method of claim 1 , wherein the patterned metal contacts comprise the pattern of pixel anodes and steering grid electrodes that is biased by a voltage potential equal to or lower than the voltage potential of the pixel anodes.

4. The method of claim 3 , the patterned metal contacts comprise the pattern of pixel anodes, steering grid electrodes and a guard ring electrode which is biased by a voltage potential equal to or lower than the voltage potential of the pixel anodes.

5. The method of claim 1 , wherein:

the semiconductor wafer comprises Cadmium Zinc Telluride (CZT); and

the first and second passivation oxide layers comprise a combination of at least two of Tellurium Oxide (TeO 2 ), TeO, CdO, CdTeO 3 , and TeO 3 .

6. The method of claim 5 , wherein the first and second passivation oxide layers are grown on the semiconductor wafer using a plasma oxidation process.

7. The method of claim 1 , wherein the pixelated anodes and the cathode electrode are formed from a metal selected from least one of indium, gold, platinum, nickel, titanium, chromium, aluminum, alloys thereof, or a stack of layers including some or all of these metals.

8. The method of claim 1 , wherein the first and second surfaces of the semiconductor are polished simultaneously in a same fabrication step.

9. The method of claim 1 , wherein the first and second surfaces of the semiconductor are polished in a plurality of different fabrication steps.

10. The method of claim 1 , wherein the pixelated anodes and the cathode electrode are formed in different fabrication steps.

11. A method for fabricating a radiation detector, the method comprising:

mechanically polishing first and second surfaces of a semiconductor wafer using a polishing sequence including a plurality of polishing steps, wherein a last polishing step of the polishing sequence includes polishing with a slurry having a grain size smaller than 0.1 μm to form polished first and second surfaces;

growing a first passivation oxide layer over the polished first surface and a second passivation oxide layer over the polished second surface, respectively;

forming patterned metal contacts on top of the first passivation oxide layer, wherein the patterned metal contacts comprise a pattern of pixel anodes;

forming a monolithic, segmented or pixelated cathode electrode on the second passivation oxide layer;

depositing an aluminum nitride (AlN) encapsulating layer over the first passivation oxide layer and the patterned metal contacts; and

forming openings in the AlN encapsulating layer coinciding with the patterned metal contacts, wherein a lateral dimension of the openings is narrower than a lateral dimension of the pixel anodes;

wherein forming the openings in the AlN encapsulating layer comprises:

forming a metallic hard mask layer over the AlN encapsulating layer;

forming a photoresist pattern over the metallic hard mask layer;

etching portions of the metallic hard mask layer metal layer exposed by the photoresist pattern using the AlN encapsulating layer as an etch stop to form hard mask openings in the metallic hard mask layer; and

etching portions of the AlN encapsulating layer exposed in the hard mask openings to form the openings in the AlN encapsulating layer.

12. The method of claim 11 , wherein the portions of the metallic hard mask layer metal layer are etched using an acidic etchant and portions of the AlN encapsulating layer are etched using a basic etchant.

13. A method for fabricating a radiation detector, the method comprising:

forming a first passivation oxide layer on a first surface of the semiconductor wafer;

forming a second passivation oxide layer on a second surface of the semiconductor wafer;

forming patterned metal contacts over the first passivation oxide layer, wherein the patterned metal contacts comprise a pattern of pixel anodes;

forming a cathode electrode over the second passivation oxide layer;

forming a lift-off mask pattern on the patterned metal contacts such that edge portions of the pixilated anodes are exposed by the lift-off mask pattern;

depositing an AlN encapsulating layer over the edge portion of the pixilated anodes and over the lift-off mask pattern; and

lifting-off the lift-off mask pattern and portions of the AlN layer encapsulating layer located over the lift-off mask pattern to form openings in the AlN layer encapsulating layer.

14. The method of claim 13 , further comprising forming a conductive material in the openings in contact with the patterned metal contacts.

15. A method for fabricating a radiation detector, the method comprising:

forming a first passivation oxide layer on a first surface of the semiconductor wafer;

forming a second passivation oxide layer on a second surface of the semiconductor wafer;

forming patterned metal contacts over the first passivation oxide layer, wherein the patterned metal contacts comprise a pattern of pixel anodes;

forming a cathode electrode over the second passivation oxide layer;

depositing an aluminum nitride (AlN) encapsulating layer over the patterned metal contacts;

forming a metallic hard mask layer over the AlN encapsulating layer;

forming a photoresist pattern over the metallic hard mask layer;

etching portions of the metallic hard mask layer exposed by the photoresist pattern using an acidic etchant and using the AlN encapsulating layer as an etch stop to form hard mask openings in the metallic hard mask layer; and

etching portions of the AlN encapsulating layer exposed in the hard mask openings using a basic etchant to form the openings in the AlN encapsulating layer.

16. The method of claim 15 , further comprising forming a conductive material in the openings in contact with the patterned metal contacts.

17. The method of claim 15 , wherein:

the acidic etchant comprises hydrofluoric acid;

the basic etchant comprises potassium hydroxide;

the patterned metal contacts comprise the pattern of pixel anodes and at least one of steering grid electrodes and a guard ring electrode;

the semiconductor wafer comprises Cadmium Zinc Telluride (CZT);

the passivation oxide layer comprises a combination of at least two of Tellurium Oxide (TeO), TeO, CdO, CdTeO 3 , and TeO 3 ; and

the metallic hard mask layer comprises Ti, W or Ta.