IP Library › Granted Patent US 9,859,367
Granted Patent B2
US 9,859,367 · App. 15/249,550 · Granted Jan 2, 2018

Stacked strained and strain-relaxed hexagonal nanowires

Inventors: Takashi Ando (Tuckahoe, NY); Pouya Hashemi (White Plains, NY); John A. Ott (Greenwood Lake, NY); Alexander Reznicek (Troy, NY)
Assignee: International Business Machines Corporation
H01L29/0673H01L21/02164H01L21/02236H01L21/02532H01L21/308H01L21/30604H01L21/8256H01L21/823431H01L21/823821H01L27/0886H01L27/0924H01L29/045H01L29/16H01L29/7842
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Quick Facts
Patent No.
US 9,859,367
App. No.
15/249,550
Granted
Jan 2, 2018
Kind
B2
Abstract

A method for forming nanowires includes forming a plurality of epitaxial layers on a substrate, the layers including alternating material layers with high and low Ge concentration and patterning the plurality of layers to form fins. The fins are etched to form recesses in low Ge concentration layers to form pillars between high Ge concentration layers. The pillars are converted to dielectric pillars. A conformal material is formed in the recesses and on the dielectric pillars. The high Ge concentration layers are condensed to form hexagonal Ge wires with (111) facets. The (111) facets are exposed to form nanowires.

Claims (32)

1. A method for forming nanowires, comprising:

forming fins, comprising of a plurality of alternating material layers with high and low Ge concentration;

etching the fins to form recesses in low Ge concentration layers to form pillars between high Ge concentration layers;

converting the pillars to dielectric pillars; and

condensing the high Ge concentration layers to form hexagonal Ge wires with (111) facets.

2. The method as recited in claim 1 , further comprising forming a conformal material in the recesses and on the dielectric pillars prior to the condensing.

3. The method as recited in claim 2 , further comprising exposing the (111) facets to form nanowires.

4. The method as recited in claim 3 , further comprising forming strained hexagonal Ge wires with (111) facets.

5. The method as recited in claim 3 , further comprising forming relaxed hexagonal Ge wires with (111) facets.

6. The method as recited in claim 3 , wherein the low concentration Ge layers include Si or SiGe with a Ge concentration less than about 50%.

7. The method as recited in claim 3 , wherein the high concentration Ge layers include SiGe with a Ge concentration greater than about 50%.

8. The method as recited in claim 3 , wherein converting the pillars to dielectric pillars includes oxidizing the pillars to form a silicon oxide.

9. The method as recited in claim 3 , wherein forming the conformal material in the recesses and on the dielectric pillars includes depositing a conformal nitride layer such that the nitride layer applies a strain to the high concentration Ge layers.

10. The method as recited in claim 3 , wherein condensing the high Ge concentration layers includes applying a temperature of up to 1050 degrees C.

11. A method for forming nanowires, comprising:

forming fins, comprised of a plurality of alternating material layers with high and low Ge concentration;

etching the fins to form recesses in low Ge concentration layers to form pillars between high Ge concentration layers;

converting the pillars to dielectric pillars;

condensing the high Ge concentration layers to form hexagonal Ge wires with (111) facets;

masking a first set of fins, which are strained, with a mask; and

etching a second set of fins that are not masked to relax the hexagonal Ge wires in the second set of fins and expose the (111) facets to form relaxed nanowires.

12. The method as recited in claim 11 , wherein the condensing further comprises forming a conformal material in the recesses and on the dielectric pillars prior to the condensing.

13. The method as recited in claim 12 , wherein forming the conformal material in the recesses and on the dielectric pillars includes depositing a conformal nitride layer such that the nitride layer applies a strain to the high concentration Ge layers.

14. The method as recited in claim 13 , further comprising:

removing the mask; and

etching the first set of fins to expose the (111) facets to form strained nanowires.

15. The method as recited in claim 14 , wherein the strained nanowires are employed with p-type devices and the relaxed nanowires are employed with n-type devices.

16. The method as recited in claim 15 , wherein the strained nanowires are employed with devices having a first threshold voltage and the relaxed nanowires are employed with devices having a second threshold voltage.

17. The method as recited in claim 11 , wherein the low concentration Ge layers include Si or SiGe with a Ge concentration less than about 50%.

18. The method as recited in claim 11 , wherein the high concentration Ge layers include SiGe with a Ge concentration greater than about 50%.

19. The method as recited in claim 11 , wherein converting the pillars to dielectric pillars includes oxidizing the pillars to form a silicon oxide.

20. The method as recited in claim 11 , wherein condensing the high Ge concentration layers includes applying a temperature of up to 1050 degrees C.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2016
From: ANDO, TAKASHI; HASHEMI, POUYA; OTT, JOHN A.; REZNICEK, ALEXANDER
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039562/0114 →
Continuity (2)
Continuation 14921164 · Oct 23, 2015
Related Publication 20170117360A1 · Apr 27, 2017