Adaptive assignment of open logical erase blocks to data streams

1. A computer-implemented method, comprising:

assigning data having a first heat to a first data stream;

assigning data having a second heat to a second data stream;

determining an anticipated throughput of each of the first and second data streams;

assigning a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream;

assigning a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream; and

performing wear leveling on open logical erase blocks prior to assigning the first and second numbers of logical erase blocks,

wherein performing the wear leveling includes:

determining a health value of each of the open logical erase blocks;

comparing the health value of each of the open logical erase blocks; and

assigning at least some of the open logical erase blocks to a queue, wherein open logical erase blocks having health values less than the health value of other logical erase blocks by a predetermined amount are skipped over during the assigning,

wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue.

2. The computer-implemented method of claim 1 , wherein the first and second numbers of logical erase blocks assigned to the first and second data streams are proportional to the anticipated throughput of the first and second data streams, respectively.

3. The computer-implemented method of claim 1 , wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams.

4. The computer-implemented method of claim 1 , wherein the first and/or second number of logical erase blocks assigned to the first and/or second data streams are adjusted dynamically based on a measurement of stream stall events of the first and/or second data streams.

5. The computer-implemented method of claim 1 , wherein the non-volatile memory includes NAND Flash memory.

6. The computer-implemented method of claim 1 , wherein the logical erase blocks are assigned to the data streams in a first-come-first-served fashion.

7. The computer-implemented method of claim 1 , wherein the logical erase blocks are assigned to the data streams in a round-robin fashion across all planes of the non-volatile memory.

8. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a controller to cause the controller to:

assign, by the controller, data having a first heat to a first data stream;

assign, by the controller, data having a second heat to a second data stream;

determine, by the controller, an anticipated throughput of each of the first and second data streams;

assign, by the controller, a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream;

assign, by the controller, a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream; and

perform, by the controller, wear leveling on open logical erase blocks prior to assigning the first and second numbers of logical erase blocks,

wherein performing the wear leveling includes:

determining a health value of each of the open logical erase blocks;

comparing the health value of each of the open logical erase blocks; and

assigning at least some of the open logical erase blocks to a queue, wherein open logical erase blocks having health values less than the health value of other logical erase blocks by a predetermined amount are skipped over during the assigning,

wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue.

9. The computer program product of claim 8 , wherein the first and second numbers of logical erase blocks assigned to the first and second data streams are proportional to the anticipated throughput of the first and second data streams, respectively.

10. The computer program product of claim 8 , wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams.

11. The computer program product of claim 8 , wherein the first and/or second number of logical erase blocks assigned to the first and/or second data streams are adjusted dynamically based on a measurement of at least one of: a temporal stream throughput, current write amplification, and stream stall events of the first and/or second data streams.

12. The computer program product of claim 8 , wherein the non-volatile memory includes NAND Flash memory.

13. The computer program product of claim 8 , wherein the logical erase blocks are assigned to the data streams in a first-come-first-served fashion.

14. The computer program product of claim 8 , wherein the logical erase blocks are assigned to the data streams in a round-robin fashion across all planes of the non-volatile memory.

15. A system, comprising:

a plurality of non-volatile random access memory blocks configured to store data; and

a processor and logic integrated with and/or executable by the processor, the logic being configured to:

assign data having a first heat to a first data stream;

assign data having a second heat to a second data stream;

determine an anticipated throughput of each of the first and second data streams;

assign a first number of logical erase blocks of non-volatile memory to the first data stream based on the anticipated throughput of the first data stream;

assign a second number of logical erase blocks of non-volatile memory to the second data stream based on the anticipated throughput of the second data stream; and

perform wear leveling on all open logical erase blocks prior to assigning the first and second numbers of logical erase blocks,

wherein performing the wear leveling includes:

determining a health value of each of the open logical erase blocks:

comparing the health value of each of the open logical erase blocks; and

assigning at least some of the open logical erase blocks to a queue, wherein open logical erase blocks having health values less than the health value of other logical erase blocks by a predetermined amount are skipped over during the assigning,

wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue,

wherein the first and/or second number of logical erase blocks are statically assigned to each of the first and/or second data streams.

16. The system of claim 15 , wherein the first and second numbers of logical erase blocks assigned to the first and second data streams are proportional to the anticipated throughput of the first and second data streams, respectively.

17. The system of claim 15 , wherein the open logical erase blocks are assigned to the queue in a round-robin fashion across all planes of the non-volatile memory, wherein the first and second numbers of logical erase blocks are assigned to the first and second data streams, respectively, from the queue in a first-come-first-served fashion, wherein comparing the health value of each of the open logical erase blocks includes comparing the health value of each of the open logical erase blocks to an average health value of the other logical erase blocks and/or a minimum health value of the other logical erase blocks.