IP Library Granted Patent US 9,892,042
Granted Patent B2
US 9,892,042 · App. 14/894,614 · Granted Feb 13, 2018

Method and system for implementing directory structure of host system

Inventors: Endong Wang (Beijing, CN); Leijun Hu (Beijing, CN); Rengang Li (Beijing, CN)
Assignee: Inspur (Beijing) Electronic Information Industry Co., Ltd.
G06F12/0817G06F12/0842G06F12/0895G06F2212/1016G06F2212/608
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Quick Facts
Patent No.
US 9,892,042
App. No.
14/894,614
Granted
Feb 13, 2018
Kind
B2
Abstract

A method and system for implementing a directory structure of a host system are disclosed. The method includes: multiple basic computing units interconnecting via a high speed internetwork to construct a system computing unit set; wherein each basic computing unit comprises a protocol processing chip and a system resource management firmware; and dividing a part implementing a logic function in the protocol processing chip into a static part and a dynamic part in advance, wherein the dynamic part can be reconstructed; constructing a system cache directory storage architecture through the dynamic part; and the system resource management firmware managing system resources by means of configuration.

Claims (12)

1. A method for implementing a directory structure of a host system, comprising:

a plurality of basic computing units interconnecting to construct a system computing unit set; wherein each of the basic computing units comprises a protocol processing chip and a system resource management firmware;

dividing a part implementing a logic function in the protocol processing chip into a static part and a dynamic part in advance, wherein the dynamic part can be reconstructed; constructing a system cache directory storage architecture through the dynamic part; the method further comprising: when a cache directory is stored with a system internal storage, configuring the dynamic part into a high-capacity on-chip memory to cache the cache directory, and when the cache directory is stored with a local double data rate synchronous random access memory (DDR), configuring the dynamic part into a plurality of memory controllers to access the cache directory stored in the local DDR.

2. The method for implementing the directory structure of the host system according to claim 1 , further comprising: maintaining a system cache consistency protocol through the static part of the protocol processing chip.

3. The method for implementing the directory structure of the host system according to claim 2 , wherein, the step of the system resource management firmware managing system resources by means of configuration comprises: when a cache directory is stored with a system internal storage, the system resource management firmware mapping directory storage space to a reserver and configuring the reserver in a reserved status, and when the cache directory is stored with the local DDR, the system resource management firmware performing address space mapping on all system internal storages.

4. The method for implementing the directory structure of the host system according to claim 1 , wherein, the step of the system resource management firmware managing system resources by means of configuration comprises: when a cache directory is stored with a system internal storage, the system resource management firmware mapping directory storage space to a reserver and configuring the reserver in a reserved status, and when the cache directory is stored with the local DDR, the system resource management firmware performing address space mapping on all system internal storages.

5. A system for implementing a directory structure of a host system, comprising: a plurality of basic computing units; wherein,

the basic computing units interconnect to construct a system computing unit set; each of the basic computing units comprises: a protocol processing chip and a system resource management firmware;

wherein, a part implementing a logic function in the protocol processing chip is divided into a static part and a dynamic part in advance, and the dynamic part can be reconstructed; and the dynamic part is configured to construct a system cache directory storage architecture; wherein: when a cache directory is stored with a system internal storage, the dynamic part is configured into a high-capacity on-chip memory to cache the cache directory, and when the cache directory is stored with a local double data rate synchronous random access memory (DDR), the dynamic part is configured into a plurality of memory controllers to access the cache directory stored in the local DDR.

6. The system for implementing the directory structure of the host system according to claim 5 , wherein, the static part is configured to maintain a system cache consistency protocol.

7. The system for implementing the directory structure of the host system according to claim 6 , wherein, the system resource management firmware managing the system resources by means of configuration refers to: when a cache directory is stored with a system internal storage, the system resource management firmware mapping directory storage space to a reserver and configuring the reserver in a reserved status, and when the cache directory is stored with the local DDR, the system resource management firmware performing address space mapping on all system internal storages.

8. The system for implementing the directory structure of the host system according to claim 5 , wherein, the system resource management firmware managing the system resources by means of configuration refers to: when a cache directory is stored with a system internal storage, the system resource management firmware mapping directory storage space to a reserver and configuring the reserver in a reserved status, and when the cache directory is stored with the local DDR, the system resource management firmware performing address space mapping on all system internal storages.

Assignments (2)
LICENSE Recorded Jun 30, 2026
From: IEIT SYSTEMS CO., LTD
To: AIVRES SYSTEMS INC.
Reel/Frame 075857/0939 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2015
From: WANG, ENDONG; HU, LEIJUN; LI, RENGANG
To: INSPUR (BEIJING) ELECTRONIC INFORMATION INDUSTRY CO., LTD.
Reel/Frame 037165/0672 →
Priority Claims (1)
CN 2014 1 0675356 · Nov 21, 2014 · national
Continuity (1)
Related Publication 20170147492A1 · May 25, 2017