IP Library Granted Patent US 9,918,147
Granted Patent B2
US 9,918,147 · App. 14/677,092 · Granted Mar 13, 2018

Transmission apparatus and transmission method

Inventor: Shota Shinohara (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H04Q11/0005G06F13/40G06F13/4291H04B10/40H04L45/745H04Q2011/0033
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Quick Facts
Patent No.
US 9,918,147
App. No.
14/677,092
Granted
Mar 13, 2018
Kind
B2
Abstract

A transmission apparatus includes: a plurality of first devices; and a second device configured to output a data signal shared by the plurality of first devices and respective first clock signals to each of the plurality of first devices, and to control the plurality of first devices individually based on the respective first clock signals.

Claims (24)

1. A transmission apparatus comprising:

a plurality of first devices; and

a second device including a data output terminal coupled to a common data line which is coupled to each of data input terminals of the respective first devices and supplies a data signal to each of the data input terminals and a plurality of clock output terminals coupled to respective clock lines which are coupled to respective clock input terminals of the respective first devices and supplies a clock signal to the respective clock lines and configured to control the plurality of first devices individually based on the clock signal; and

a device selection circuit configured to select one first device from among the plurality of first devices based on an input address; and

a plurality of clock selection circuits coupled to the respective clock lines of the respective first devices and each configured to supply the clock signal, a first signal having a first level, and a second signal having a second level to the respective clock lines based on a selection result of the device selection circuit,

wherein, when the device selection circuit selects the one first device in a state in which each of the plurality of clock selection circuits supplies the first signal to the respective clock lines, the clock selection circuit coupled to the selected first device, switches a supply to the respective clock lines from the first signal to the clock signal, and one or more clock selection circuits coupled to one or more remaining first devices other than the selected first device, switch a supply to the respective clock lines from the first signal to the second signal.

2. The transmission apparatus according to claim 1 , wherein the one or more clock selection circuits are configured to start supplying the second signal to the respective clock lines at a first timing when an access to the selected first device starts and the clock selection circuit coupled to the selected first device is configured to start supplying the clock signal to the respective clock lines at a second timing obtained by delaying the first timing.

3. The transmission apparatus according to claim 1 , wherein the second device is coupled with the plurality of first devices by an I2C (Inter Integrated Circuit) interface.

4. The transmission apparatus according to claim 1 , wherein a communication speed of at least one of the plurality of first devices is different from a communication speed of the second device.

5. The transmission apparatus according to claim 1 , wherein the second device includes:

an address identification circuit configured to output a device selection signal for selecting one of the plurality of first devices as the selected first device based on the input address, and the device selection circuit is configured to output a control signal for controlling the clock signal based on the device selection signal.

6. The transmission apparatus according to claim 1 , wherein the first signal is a high-impedance signal.

7. The transmission apparatus according to claim 6 , wherein each of the plurality of clock selection circuits is coupled to a clock generation circuit which generates the clock signal.

8. The transmission apparatus according to claim 6 , wherein the plurality of clock selection circuits each includes a selector configured to select one of the clock signal, the first signal and the second signal.

9. The transmission apparatus according to claim 1 , wherein the second device includes an FPGA (Field Programmable Gate Array).

10. A transmission method comprising:

transmitting a data signal from a data output terminal of a second device to each of a plurality of data input terminals of respective first devices through a common data line;

supplying, by a plurality of clock selection circuits, a first signal to respective clock lines coupled to the respective first devices;

selecting a first device from among the first devices in a state in which each of the plurality of clock selection circuits supplies the first signal to the respective clock lines;

switching, by the clock selection circuit provided for the selected first device, a supply to the respective clock lines from the first signal to a clock signal when the first device is selected; and

switching, by one or more clock selection circuits coupled to one or more remaining first devices other than the selected first device, a supply to the respective clock lines from the first signal to a second signal when the first device is selected.

11. The transmission method according to claim 10 , further comprising:

starting, by the one or more clock selection circuits, supplying the second signal to the respective clock lines at a first timing when an access to the selected first device starts; and

starting, by the clock selection circuit provided for the selected first device, supplying the clock signal to the respective clock lines at a second timing obtained by delaying the first timing.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2015
From: SHINOHARA, SHOTA
To: FUJITSU LIMITED
Reel/Frame 035346/0713 →
Priority Claims (1)
JP 2014-122814 · Jun 13, 2014 · national
Continuity (1)
Related Publication 20150365740A1 · Dec 17, 2015