Semiconductor device and manufacturing method thereof
A semiconductor device includes a first semiconductor channel, a second semiconductor channel, a first gate stack and a second gate stack. The first gate stack includes N-work function metal present on the first semiconductor channel. The second gate stack includes N-work function metal present on the second semiconductor channel. The N-work function metal in the first gate stack and the second gate stack are substantially different. The difference includes at least one of N-work function metal type and N-work function metal amount.
1. A semiconductor device, comprising:
a first semiconductor channel;
a second semiconductor channel;
a first gate stack comprising a first N-work function metal layer present on the first semiconductor channel; and
a second gate stack comprising a second N-work function metal layer present on the second semiconductor channel, wherein work functions of the first and second N-work function metal layers are different and lower than a mid-gap work function that is in a middle of a valance band and a conduction band of silicon.
2. The semiconductor device of claim 1 , wherein the first gate stack further comprises a third N-work function metal layer over the first N-work function metal layer, and a combination of the first and third N-work function metal layers has a thickness different from a thickness of the second N-work function metal layer.
3. The semiconductor device of claim 2 , wherein one of the first and third N-work function metal layers has a metal composition different from a metal composition of the second N-work function metal layer.
4. The semiconductor device of claim 1 , wherein the first gate stack further comprises third N-work function metal layer present on the first N-work function metal layer.
5. The semiconductor device of claim 4 , wherein the first N-work function metal layer and the third N-work function metal layer are made of different materials.
6. The semiconductor device of claim 4 , wherein first N-work function metal layer and the third N-work function metal layer are made of substantially the same material.
7. The semiconductor device of claim 4 , wherein the first gate stack further comprises an oxidation layer present between the first N-work function metal layer and the third N-work function metal layer.
8. The semiconductor device of claim 7 , wherein the oxidation layer comprises metal substantially the same as that of the first N-work function metal layer.
9. The semiconductor device of claim 4 , wherein the third N-work function metal layer and the second N-work function metal layer are made of substantially the same material.
10. The semiconductor device of claim 9 , wherein the first gate stack further comprises a first filling conductor layer present in a recess of the third N-work function metal layer, the second gate stack further comprises a second filling conductor layer present in a recess of the second N-work function metal layer, and the first filling conductor layer is narrower than the second filling conductor layer.
11. The semiconductor device of claim 4 , wherein a material of the first N-work function metal layer is absent in the second gate stack.
12. A semiconductor device, comprising:
a semiconductor substrate;
a gate dielectric present on the semiconductor substrate;
a metal gate electrode present on the gate dielectric, the metal gate electrode comprising:
a first N-work function metal layer; and
a second N-work function metal layer present on the first N-work function metal layer, the second N-work function metal layer having an N-work function different from an N-work function of the first N-work function metal layer, wherein the N-work functions of the first and second N-work function metal layers are lower than a mid-gap work function that is in a middle of a valance band and a conduction band of silicon.
13. The semiconductor device of claim 12 , further comprising:
an oxidation layer present between the first N-work function metal layer and the second N-work function metal layer.
14. The semiconductor device of claim 13 , wherein the oxidation layer is in contact with the first N-work function metal layer.
15. The semiconductor device of claim 13 , wherein the oxidation layer comprises metal substantially the same as that in the first N-work function metal layer.
16. The semiconductor device of claim 12 , further comprising:
a P-work function metal layer present between the first N-work function metal layer and the gate dielectric.
17. A semiconductor device, comprising:
a semiconductor substrate;
a gate dielectric over the semiconductor substrate; and
a gate structure over the gate dielectric, the gate structure comprising a first N-work function metal layer, an oxide layer over the first N-work function metal layer; and a second N-work function metal layer over the oxide layer, wherein work functions of the first and second N-work function metal layers are different and lower than a mid-gap work function that is in a middle of a valance band and a conduction band of silicon.
18. The semiconductor device of claim 17 , wherein the oxide layer is embedded in the first N-work function metal layer.
19. The semiconductor device of claim 17 , wherein the second N-work function metal layer is embedded in the oxide layer.
20. The semiconductor device of claim 17 , wherein opposite surfaces of the oxide layer are respectively in contact with the first and second N-work function metal layers.