IP Library Granted Patent US 9,960,046
Granted Patent B2
US 9,960,046 · App. 15/609,099 · Granted May 1, 2018

Methods of manufacturing semiconductor device having a blocking insulation layer

Inventors: Jung Ho Kim (Seongnam-si, KR); Bio Kim (Seoul, KR); Jaeyoung Ahn (Seongnam-si, KR); Dongchul Yoo (Seongnam-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L21/28282H01L21/0217H01L21/0223H01L21/02164H01L27/1157H01L27/11582
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Quick Facts
Patent No.
US 9,960,046
App. No.
15/609,099
Granted
May 1, 2018
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes forming insulation layers and sacrificial layers that are alternately and repeatedly stacked on top of each other a substrate, forming a vertical hole that penetrates the insulation layers and the sacrificial layers, and forming a vertical channel structure in the vertical hole. The forming the vertical channel structure includes forming a blocking insulation layer, a charge storage layer, a tunnel insulation layer, and a semiconductor pattern. The forming the blocking insulation layer includes forming a first oxidation target layer, oxidizing the first oxidation target layer to form a first sub-blocking layer, and forming a second sub-blocking layer. The first sub-blocking layer is formed between the second sub-blocking layer and an inner sidewall of the vertical hole.

Claims (51)

1. A method of manufacturing a semiconductor device, the method comprising:

forming insulation layers and sacrificial layers that are alternately and repeatedly stacked on top of each other on a substrate;

forming a vertical hole that penetrates the insulation layers and the sacrificial layers; and

forming a vertical channel structure in the vertical hole,

the forming the vertical channel structure including forming a blocking insulation layer, a charge storage layer, a tunnel insulation layer, and a semiconductor pattern,

the forming the blocking insulation layer including forming a first oxidation target layer, oxidizing the first oxidation target layer to form a first sub-blocking layer, and forming a second sub-blocking layer such that the first sub-blocking layer is between the second sub-blocking layer and an inner sidewall of the vertical hole.

2. The method of claim 1 , wherein the forming the first oxidation target layer includes forming the first oxidation target layer to include silicon or silicon nitride.

3. The method of claim 2 , wherein the forming the first sub-blocking layer includes forming the first sub-blocking layer to include silicon oxide based on oxidizing the silicon or silicon nitride included in the first oxidation target layer.

4. The method of claim 1 , wherein the forming the second sub-blocking layer includes depositing silicon oxide on the substrate.

5. The method of claim 4 , wherein the oxidizing the first oxidation target layer is performed after the forming the second sub-blocking layer.

6. The method of claim 1 , wherein the forming the second sub-blocking layer includes:

forming a second oxidation target layer; and

oxidizing the second oxidation target layer.

7. The method of claim 6 , wherein

a remaining portion of the first oxidation target layer remains after oxidizing the first oxidation target layer, and

the oxidizing the second oxidation target layer includes oxidizing the remaining portion of the first oxidation target layer during the oxidizing the second oxidation target layer.

8. The method of claim 1 , wherein a microstructure of the first sub-blocking layer is finer than a microstructure of the second sub-blocking layer.

9. The method of claim 1 , further comprising:

removing the sacrificial layers to form gap regions, wherein

the gap regions expose the first sub-blocking layer.

10. The method of claim 9 , wherein the gap regions do not expose the second sub-blocking layer.

11. The method of claim 1 , wherein the forming the first sub-blocking layer includes forming the first sub-blocking layer to extend along a direction perpendicular to a top surface of the substrate.

12. A method of manufacturing a semiconductor device, the method comprising:

forming insulation layers and sacrificial layers that are alternately and repeatedly stacked on top of each other on a substrate;

forming a vertical hole that penetrates the insulation layers and the sacrificial layers; and

forming a vertical channel structure in the vertical hole,

the forming the vertical channel structure including forming a first sub-blocking layer on an inner sidewall of the vertical hole, and forming a second sub-blocking layer on an inner sidewall of the first sub-blocking layer,

the forming the first sub-blocking layer including forming a silicon nitride layer on the inner sidewall of the vertical hole, and oxidizing the silicon nitride layer.

13. The method of claim 12 , wherein the forming the first sub-blocking layer includes forming the silicon nitride layer to contact the inner sidewall of the vertical hole.

14. The method of claim 12 , wherein the forming the first sub-blocking layer includes forming the first sub-blocking layer to include nitrogen greater than 0.0 at % and less than or equal to about 0.1 at %.

15. The method of claim 12 , further comprising:

removing the sacrificial layers to form gap regions that expose the first sub-blocking layer, wherein

the gap regions do not expose the second sub-blocking layer.

16. A method of manufacturing a semiconductor device, the method comprising:

forming a vertical hole that penetrates a preliminary stack structure on a substrate, the preliminary stack structure including a plurality of first layers and a plurality of second layers that are alternately and repeatedly stacked on top of each other on the substrate, a material of the first layers being different than a material of the second layers;

forming a blocking insulation layer in the vertical hole, the forming the blocking insulation layer including forming a first oxidation target layer, forming a first sub-blocking layer by oxidizing the first oxidation target layer, and forming a second sub-blocking layer such that the first sub-blocking layer is between the second sub-blocking layer and an inner sidewall of the vertical hole.

17. The method of claim 16 , wherein

the forming the first oxidation target layer includes forming the first oxidation target layer to include silicon or silicon nitride, and

the forming the first sub-blocking layer includes forming the first sub-blocking layer to include silicon oxide based on oxidizing the silicon or silicon nitride included in the first oxidation target layer.

18. The method of claim 16 , wherein

the forming the second sub-blocking layer includes depositing silicon oxide on the substrate, and

the oxidizing the first oxidation target layer is performed after the forming the second sub-blocking layer.

19. The method of claim 16 , further comprising:

forming a vertical channel structure in the vertical hole, wherein

the first layers are insulation layers,

the second layers are sacrificial layers, and

the forming the vertical channel structure includes the forming the blocking insulation layer in the vertical hole and forming a semiconductor pattern.

20. The method of claim 19 , further comprising:

removing the sacrificial layers to form gap regions, wherein

the gap regions expose the first sub-blocking layer, and

the gap regions do not expose the second sub-blocking layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2017
From: KIM, JUNG HO; KIM, BIO; AHN, JAEYOUNG; YOO, DONGCHUL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 042565/0421 →
Priority Claims (1)
KR 10-2016-0122406 · Sep 23, 2016 · national
Continuity (1)
Related Publication 20180090329A1 · Mar 29, 2018