High frequency common mode rejection technique for large dynamic common mode signals
A system is disclosed which allows for canceling high frequency rail to rail common mode swing at pulse-width modulation (PWM) frequency for a Class-D, H and G audio amplifier or a Linear Resonance Actuator (LRA) driver. This allows wide bandwidth current sensing without the need of external components, or large on-chip resistor-capacitor (RC) networks, facilitating integration of the sense resistor. In addition, the sense amplifier DC input common mode and audio band common mode swing is reduced, allowing a sense resistor high frequency common mode swing of a least twice the MOSFET gate break down voltages.
1. A high frequency common mode rejection circuit for large dynamic common mode signals, comprising:
a sense resistor, configured in series with a load;
a summing amplifier configured to sense current through said sense resistor, an output of said summing amplifier comprising said common mode signals;
a low pass filter between said sense resistor and said summing amplifier; and
a high voltage (HV) inverter, having a supply voltage of 8 or more volts, having its input connected to said sense resistor on a side of said sense resistor opposite to said load and having its output connected to said low pass filter.
2. The circuit of claim 1 , wherein said sense resistor is configured in series with a Class-D, H or G audio amplifier, and wherein said load is an audio speaker.
3. The circuit of claim 1 , wherein said sense resistor is configured in series with a Class-D, H or G audio amplifier, and wherein said load is an inductive load.
4. The circuit of claim 1 , wherein said sense resistor is configured in series with a linear resonance actuator (LRA) driver, and wherein said load is a linear resonance actuator.
5. The circuit of claim 1 , wherein said sense resistor is configured for continuous wide bandwidth current monitoring.
6. The circuit of claim 1 , wherein said high voltage inverter is configured to allow a high frequency common mode swing on said summing amplifier.
7. The circuit of claim 1 , wherein said high voltage inverter is configured to cancel a swing common mode signal with an anti-phase signal.
8. The circuit of claim 1 , wherein said high voltage inverter comprises buffered and delayed control signals, and further comprises a high side and a low side device.
9. The circuit of claim 1 , wherein said common mode of said summing amplifier is independent of a pulse-width modulation frequency or modulation depth.
10. The circuit of claim 1 , wherein said low pass filter comprises first or second order filtering.
11. The circuit of claim 1 , wherein said circuit further comprises a chopper, to reduce the effects of mismatch in resistors at an output of said high voltage inverter.
12. The circuit of claim 8 , wherein said high side and low side devices are bipolar transistors.
13. The circuit of claim 1 , wherein the common mode behaves like a Class D amplifier output.
14. A method for high frequency common mode rejection for large dynamic common mode signals, comprising the steps of:
providing a sense resistor, configured in series with a load;
providing a high voltage (HV) inverter, having a supply voltage of 8 of more volts, having an input of said high voltage inverter connected to said sense resistor on a side of said sense resistor opposite to said load;
sensing current through said sense resistor, configured to a summing amplifier, an output of said summing amplifier comprising said common mode signals; and
providing a low pass filter between said sense resistor and said summing amplifier
cancelling said common mode signals, allowing a high frequency common mode swing on said summing amplifier.
15. The method of claim 14 , wherein the sense resistor continuously monitors wide bandwidth current.
16. The method of claim 14 , wherein the high voltage inverter reduces audio band common mode.
17. The method of claim 14 , wherein the high voltage inverter allows a high frequency common mode swing on the summing amplifier.
18. The method of claim 14 , wherein the high voltage inverter cancels a large swing common mode signal with an anti-phase signal.
19. The method of claim 14 , wherein the summing amplifier reduces DC input common mode swing.