Semiconductor device having passing gate and method for fabricating the same
A semiconductor device that has a passing gate with a single gate electrode and a main gate with lower and upper gate electrodes mitigates gate induced drain leakage (GIDL). Additional elements that help mitigate GIDL include the upper gate electrode having a lower work function than the lower gate electrode, and the lower gate electrode being disposed below a storage node junction region while the upper gate electrode is disposed at a same level as the storage node junction region.
1. A semiconductor device comprising:
a device isolation film defining an active region; and
a gate having a main gate part and a passing gate part, and buried in the active region and the device isolation film,
wherein the main gate has first and second gate electrodes, and is buried in the active region, and
the only gate electrode for the passing gate is the first gate electrode, and the passing gate is buried in the device isolation film.
2. The semiconductor device according to claim 1 , wherein the first gate electrode is provided below the second gate electrode, and
wherein the first gate electrode has a first work function and the second gate electrode has a second work function, the second work function being lower than the first work function.
3. The semiconductor device according to claim 2 , wherein the first gate electrode is disposed at a lower level than a junction region of the active region.
4. The semiconductor device according to claim 2 , wherein the second gate electrode is formed at a substantially same level as a junction region of the active region.
5. The semiconductor device according to claim 2 , wherein the passing gate and the main gate are both disposed in a same line-type gate trench.
6. The semiconductor device according to claim 2 , wherein the passing gate is located between adjacent storage node junction regions.
7. The semiconductor device according to claim 6 , wherein the passing gate is disposed below the storage node junction regions.
8. The semiconductor device according to claim 2 , wherein the second gate electrode includes one or more of nitrogen (N), oxygen (O), arsenic (As), aluminum (Al), and hydrogen (H) ions implanted into a conductive material of the first gate electrode.
9. A semiconductor device comprising:
a device isolation film defining an active region;
a first gate electrode provided in a first trench, the first trench formed within the active region and the device isolation film; and
a second gate electrode provided within the first gate trench and located over portions of the first gate electrode that are buried in the active region, and not disposed over portions of the first gate electrode that are buried in the device isolation film between adjacent active regions.
10. The semiconductor device according to claim 9 , wherein each of the adjacent active regions includes a storage node junction region.
11. The semiconductor device according to claim 9 , wherein the first gate electrode is formed at a lower level than a junction region of the adjacent active regions.
12. The semiconductor device according to claim 11 , wherein the second gate electrode is formed at a substantially same level as the junction region of the active regions.
13. The semiconductor device according to claim 9 , wherein the first gate electrode and the second gate electrode have different work functions, the first gate electrode being provided below the second gate electrode.
14. The semiconductor device according to claim 13 , wherein the second gate electrode has a lower work function than the first gate electrode.
15. The semiconductor device according to claim 14 , wherein the second gate electrode includes one or more of nitrogen (N), oxygen (O), arsenic (As), aluminum (Al), and hydrogen (H) ions implanted into a conductive material of the first gate electrode.
16. A semiconductor device comprising:
a device isolation film defining an active region;
a main gate having first and second gate electrodes provided in a first trench, the second gate electrode being provided over the first gate electrode and having an upper surface provided within the first trench;
a passing gate having only a third gate electrode provided in a second trench, the third gate electrode having an upper surface provided within the second trench; and
a dielectric film having first and second portions, the first portion extending into the first trench and having a lower end proximate to the upper surface of the second gate electrode, the second portion extending into the second trench and having a lower end proximate to the upper surface of the third gate electrode,
wherein the lower end of the second portion is at a lower level than the lower end of the first portion.
17. The semiconductor device of claim 16 , wherein the first gate electrode and the third gate electrode comprise substantially the same material.
18. The semiconductor device of claim 16 , further comprising:
a bit-line contact region; and
a storage node contact region provided between the main gate and the passing gate,
wherein the main gate is provided between the bit line contact region and the storage node contact region.
19. The semiconductor device of claim 18 , wherein each active region defines first and second storage node contact regions and a bit-line contact region, and
wherein the device defines a layout configuration of 6F 2 .