Vertical MIM capacitor

1. A method for forming a vertical metal-insulator-metal capacitor, the method comprising:

providing a semiconductor substrate comprising a metal conductor disposed on a first non-conductive capping layer; wherein the metal conductor comprises a conductive metal cap layer on a top surface;

selectively depositing a high k dielectric material onto a sidewall of the metal conductor;

conformally depositing a metal plate layer onto topography defined by the metal conductor and the first non-conductive capping layer;

depositing an insulator layer onto the semiconductor substrate;

planarizing the semiconductor substrate to the top surface of the metal conductor, wherein the metal conductor sidewalls and the high k dielectric material are vertically oriented, and the metal plate layer includes vertically oriented and horizontally oriented portions on each side of the vertically oriented high k dielectric material;

forming a second non-conductive capping layer on the planar surface of the semiconductor substrate;

forming an second insulator layer onto the capping layer;

forming first and second vias, wherein the first via extends to the metal conductor and the second via extends to a horizontal portion of the metal plate layer;

filling the first and second vias with a metal to define first and second electrodes.

2. The method of claim 1 , further comprising forming an upper level interconnect and creating electrical contacts to both the metal conductor and the metal cap layer.

3. The method of claim 1 , wherein the metal cap layer onto the top surface of the metal conductor is selectively formed by chemical vapor deposition or atomic layer deposition.

4. The method of claim 1 , wherein the high k dielectric comprises tantalum oxide, barium strontium titanate, strontium titanate, barium titanate, lead zirconium titanate, silicon carbide, silicon oxynitride, silicon nitride, zirconium oxide, aluminum oxide, hafnium oxide, or strontium bismuth tantalite.

5. The method of claim 1 , wherein the metal conductor and the metal plate layer are different metals.

6. The method of claim 1 , wherein the metal conductor comprises a metal and a metal liner layer on sidewalls and a bottom surface thereof intermediate to the first capping layer, and the metal plate layer is a single metallic layer.

7. The method of claim 1 , wherein the metal conductor comprises copper, aluminum, tungsten, ruthenium, iridium, rhodium, cobalt, or mixtures thereof.

8. A method for forming a vertical metal-insulator-metal capacitor, the method comprising:

blanket depositing a dielectric cap layer onto coplanar top surfaces of a metal conductor formed within a patterned insulator layer;

patterning the dielectric cap layer to expose the top surface of the patterned insulator layer;

removing the exposed patterned insulator layer surrounding the metal conductor;

selectively depositing a high k dielectric material onto a sidewall of the metal conductor;

conformally depositing a metal plate layer onto the semiconductor substrate;

depositing a second insulator layer onto the semiconductor substrate;

planarizing the semiconductor substrate to expose the top surface of the metal conductor, wherein the metal conductor sidewall and the high k dielectric material are vertically oriented and the metal plate layer includes vertically and horizontally oriented portions to define the vertical MIM capacitor.

9. The method of claim 8 further comprising forming an upper level interconnect and creating electrical contacts to the metal conductor.

10. The method of claim 8 , wherein the high k dielectric comprises tantalum oxide, barium strontium titanate, strontium titanate, barium titanate, lead zirconium titanate, silicon carbide, silicon oxynitride, silicon nitride, zirconium oxide, aluminum oxide, hafnium oxide, or strontium bismuth tantalate.

11. The method of claim 8 , wherein the metal conductor and the metal plate layer are different materials.

12. The method of claim 8 , wherein the metal conductor comprises a metal and a metal liner layer formed on sidewalls and a bottom surface, and the metal plate layer is a single metallic layer.

13. The method of claim 8 , wherein the metal conductor comprises copper, aluminum, tungsten, ruthenium, iridium, rhodium, cobalt, or mixtures thereof.