Active beam-forming technique for piezoelectric ultrasonic transducer array

1. An apparatus comprising:

an array of cells, each cell including a pixel, each pixel including a piezoelectric micromechanical ultrasonic transducer (PMUT) element disposed on a substrate and, disposed within the cell, on the substrate, an in-cell pixel logic, a cell output interface logic and a cell input interface logic, each in-cell pixel logic being communicatively coupled with the in-cell pixel logic of at least one adjacent pixel in the array; and

transceiver electronics communicatively coupled with the array and configured to operate the array in a selectable one of a first mode and a second mode, wherein:

in the first mode, the array generates a substantially plane ultrasonic wave having a first acoustic pressure;

in the second mode, the array generates, from at least one superpixel region, a focused beam having a second acoustic pressure that is substantially higher than the first acoustic pressure, each superpixel region including at least one inner pixel disposed in a central portion of the superpixel region and at least a first group of outer pixels disposed in an outer portion of the superpixel region;

the transceiver electronics is configured to operate the array by configuring at least one in-cell pixel logic and to selectably designate at least one pixel as an inner pixel and send a selection signal to the designated inner pixel; and

upon the designated inner pixel receiving the selection signal, the cell output interface logic of the designated inner pixel is configured to send a wake-up signal to the cell input interface logic of a second pixel adjacent to the designated inner pixel.

2. The apparatus of claim 1 , wherein the PMUT element is disposed on a substrate, the substrate including thin-film transistor (TFT) circuitry.

3. The apparatus of claim 2 , wherein the TFT circuitry is co-fabricated with the PMUT element.

4. The apparatus of claim 2 , wherein the TFT circuitry includes the in-cell pixel logic.

5. The apparatus of claim 1 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, using a serial interface structure to clock in configuration information to each pixel and associate each pixel with a corresponding superpixel.

6. The apparatus of claim 5 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, designating each pixel as a center pixel or an outer pixel of the corresponding superpixel.

7. The apparatus of claim 1 , wherein the in-cell pixel logic includes a 2-bit memory, a 2-bit decoder, and a 2-bit shift register.

8. The apparatus of claim 1 , wherein the transceiver electronics includes at least one decoder configured to address and configure the in-cell pixel logic.

9. The apparatus of claim 8 , wherein the at least one decoder is configured to selectably designate each pixel as an inner pixel or an outer pixel of a corresponding superpixel.

10. The apparatus of claim 1 , wherein the cell input interface logic is a seven input OR-gate configured to receive inputs from the decoder and from one or more adjacent pixels.

11. A non-transitory computer readable medium having software stored thereon, the software including instructions for causing an apparatus to:

operate an array of cells, each cell including a pixel, each pixel including a piezoelectric micromechanical ultrasonic transducer (PMUT) element disposed on a substrate and, disposed within the cell, on the substrate, an in-cell pixel logic, a cell output interface logic and a cell input interface logic, in a selectable one of a first mode and a second mode, each in-cell pixel logic being communicatively coupled with the in-cell pixel logic of at least one adjacent pixel in the array; wherein:

a transceiver electronics is configured to operate the array by configuring at least one in-cell pixel logic and to selectably designate at least one pixel as an inner pixel and send a selection signal to the designated inner pixel; and upon the designated inner pixel receiving the selection signal, the cell output interface logic of the designated inner pixel is configured to send a wake-up signal to the cell input interface logic of a second pixel adjacent to the designated inner pixel;

in the first mode, operating the array generates a substantially plane ultrasonic wave having a first acoustic pressure; and

in the second mode, operating the array generates, from at least one superpixel region, a focused beam having a second acoustic pressure that is substantially higher than the first acoustic pressure, each superpixel region including at least one inner pixel disposed in a central portion of the superpixel region and at least a first group of outer pixels disposed in an outer portion of the superpixel region.

12. The computer readable medium of claim 11 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, using a serial interface structure to clock in configuration information to each pixel and associate each pixel with a corresponding superpixel.

13. The computer readable medium of claim 12 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, designating each pixel as a center pixel or an outer pixel of the corresponding superpixel.

14. The computer readable medium of claim 11 , wherein the transceiver electronics includes at least one decoder configured to address and configure the in-cell pixel logic.

15. The computer readable medium of claim 14 , wherein the at least one decoder is configured to selectably designate each pixel as an inner pixel or an outer pixel of a corresponding superpixel.

16. A method comprising:

operating an array of cells, each cell including a pixel, each pixel including a piezoelectric micromechanical ultrasonic transducer (PMUT) element disposed on a substrate and, disposed within the cell, on the substrate, an in-cell pixel logic, a cell output interface logic and a cell input interface logic, in a selectable one of a first mode and a second mode, each in-cell pixel logic being communicatively coupled with at least one adjacent pixel in the array; wherein:

a transceiver electronics is configured to operate the array by configuring at least one in-cell pixel logic and to selectably designate at least one pixel as an inner pixel and send a selection signal to the designated inner pixel; and upon the designated inner pixel receiving the selection signal, the cell output interface logic of the designated inner pixel is configured to send a wake-up signal to the cell input interface logic of a second pixel adjacent to the designated inner pixel;

in the first mode, operating the array generates a substantially plane ultrasonic wave having a first acoustic pressure; and

in the second mode, operating the array generates, from at least one superpixel region, a focused beam having a second acoustic pressure that is substantially higher than the first acoustic pressure, each superpixel region including at least one inner pixel disposed in a central portion of the superpixel region and at least a first group of outer pixels disposed in an outer portion of the superpixel region.

17. The method of claim 16 , wherein the PMUT element is disposed on a substrate, the substrate including thin-film transistor (TFT) circuitry co-fabricated with the PMUT element, the TFT circuitry including the in-cell pixel logic.

18. The method of claim 16 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, using a serial interface structure to clock in configuration information to each pixel and associate each pixel with a corresponding superpixel.

19. The method of claim 18 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, designating each pixel as a center pixel or an outer pixel of the corresponding superpixel.

20. The method of claim 16 , wherein the transceiver electronics includes at least one decoder configured to address and configure the in-cell pixel logic.

21. The method of claim 20 , wherein the at least one decoder is configured to selectably designate each pixel as an inner pixel or an outer pixel of a corresponding superpixel.

22. An apparatus comprising:

an array of cells, each cell including a pixel, each pixel including a piezoelectric micromechanical ultrasonic transducer (PMUT) element disposed on a substrate and, disposed within the cell, on the substrate, an in-cell pixel logic, a cell output interface logic and a cell input interface logic, each in-cell pixel logic being communicatively coupled with at least one adjacent pixel in the array; and

means for operating the array in a selectable one of a first mode and a second mode by configuring at least one in-cell pixel logic, designating at least one pixel as an inner pixel and sending a selection signal to the designated inner pixel, wherein:

in the first mode, the array generates a substantially plane ultrasonic wave having a first acoustic pressure;

in the second mode, the array generates, from at least one superpixel region, a focused beam having a second acoustic pressure that is substantially higher than the first acoustic pressure, each superpixel region including at least one inner pixel disposed in a central portion of the superpixel region and at least a first group of outer pixels disposed in an outer portion of the superpixel region; and

upon the designated inner pixel receiving the selection signal, the cell output interface logic of the designated inner pixel is configured to send a wake-up signal to the cell input interface logic of a second pixel adjacent to the designated inner pixel.

23. The apparatus of claim 22 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, using a serial interface structure to clock in configuration information to each pixel and associate each pixel with a corresponding superpixel.

24. The apparatus of claim 23 , wherein configuring the at least one in-cell pixel logic includes, in the second mode, designating each pixel as a center pixel or an outer pixel of the corresponding superpixel.

25. The apparatus of claim 22 , wherein the in-cell pixel logic includes a 2-bit memory, a 2-bit decoder, and a 2-bit shift register.

26. The apparatus of claim 22 , further including at least one decoder configured to address and configure the in-cell pixel logic.