Refresh control device with plurality of oscillator circuits
A refresh control device, and a memory device may be provided. The latch controller may include a first oscillator configured to generate a first oscillation signal, and a second oscillator configured to generate a second oscillation signal. The latch controller may be configured to receive a precharge signal and prevent the second oscillation signal from being synchronized with the precharge signal.
1. A refresh control device comprising:
a first oscillator configured to generate a first oscillation signal having a predetermined time period;
a second oscillator configured to generate a second oscillation signal having a predetermined time period;
a counter configured to generate a pre-enable signal synchronized with the first oscillation signal based on a precharge signal; and
a combination circuit configured to output a latch enable signal based on the second oscillation signal and the pre-enable signal and prevent the second oscillation signal from being synchronized with the precharge signal,
wherein the second oscillation signal has a different time period than the first oscillation signal.
2. The refresh control device according to claim 1 , wherein the combination circuit is configured to output the latch enable signal synchronized with the second oscillation signal during an activation section of the pre-enable signal.
3. The refresh control device according to claim 1 , wherein the combination circuit, when the second oscillation signal and the pre-enable signal are activated, is configured to activate the latch enable signal and output the activated latch enable signal.
4. The refresh control device according to claim 1 , wherein the combination circuit is configured to output the latch enable signal based on the second oscillation signal and the pre-enable signal.