Voltage generator circuit and method for controlling thereof
View Patent ↗A voltage generator circuit which is capable of preventing the generation of a through current in a transition to a power-down mode to reduce current consumption. The voltage generator circuit includes a voltage generator activated by a reference voltage to generate an output voltage. A reference voltage clamp circuit is coupled to the voltage generator for clamping the reference voltage to a first voltage in response to a power-down signal to deactivate the voltage generator. An output voltage clamp circuit is coupled to the voltage generator for clamping the output voltage to a second voltage. A control circuit is coupled to the output voltage clamp circuit for enabling the output voltage clamp circuit after the voltage generator is deactivated in response to the power-down signal.
1. A voltage generator circuit comprising:
a voltage generator activated by a reference voltage to generate an output voltage;
a reference voltage clamp circuit coupled to the voltage generator for clamping the reference voltage to a predetermined clamp voltage in response to a power-down signal to deactivate the voltage generator; and
a sub-threshold current reduction circuit including a resistor coupled between the voltage generator and one of a high potential power supply and a low potential power supply, wherein a resistance value of the resistor is at least 10 5 Ω to maintain the output voltage to a value slightly higher than the voltage of the low potential power supply so that a sub-threshold current flowing into the voltage generator is reduced when the voltage generator is deactivated.
2. A voltage generator circuit comprising:
a voltage generator activated by a reference voltage to generate an output voltage;
a reference voltage clamp circuit coupled to the voltage generator for clamping the reference voltage to a predetermined clamp voltage in response to a power-down signal to deactivate the voltage generator; and
a sub-threshold current reduction circuit for reducing a sub-threshold current flowing into the voltage generator when the voltage generator is deactivated,
wherein the output signal is supplied to an internal circuit of a semiconductor device, and the sub-threshold current reduction circuit includes a balance voltage setting circuit for setting a balance voltage at which the sub-threshold current flowing into the voltage generator balances a sub-threshold current flowing into the internal circuit.
3. The voltage generator circuit according to claim 2 , wherein the voltage generator includes an N-channel MOS transistor having a drain which receives a high potential supply voltage, a gate which receives the reference voltage, and a source, and the balance voltage setting circuit includes a resistor coupled between the source of the N-channel MOS transistor and an external power supply and having a high resistance.
4. The voltage generator circuit according to claim 3 , wherein the resistor is coupled between the source of the N-channel MOS transistor and one of an external high potential power supply and an external low potential power supply.
5. The voltage generator circuit according to claim 4 , further comprising a switch for connecting a resistance between the source of the N-channel MOS transistor and one of the high potential power supply and the low potential power supply.
6. The voltage generator circuit according to claim 2 , wherein the voltage generator includes an N-channel MOS transistor having a drain which receives a high potential supply voltage, a gate which receives the reference voltage, and a source, and the balance voltage setting circuit supplies the balance voltage to the source of the N-channel MOS transistor.
7. A voltage generator circuit comprising:
a voltage generator activated by a reference voltage to generate an output voltage, wherein the voltage generator includes a transistor having a gate and a back gate;
a reference voltage clamp circuit coupled to the voltage generator for clamping the reference voltage to a predetermined clamp voltage in response to a power-down signal to deactivate the voltage generator; and
a sub-threshold current shut-off circuit for shutting off generation of a sub-threshold current of the voltage generator by controlling a voltage directly applied to the back gate of the transistor of the voltage generator, and wherein the sub-threshold current shut-off circuit sets a predetermined clamp voltage at the gate of the transistor to a voltage at which the sub-threshold current can be shut off by controlling a voltage applied to the reference voltage clamp circuit.
8. The voltage generator circuit according to claim 7 , wherein the transistor is an N-channel MOS transistor, and the sub-threshold current shut-off circuit supplies a substrate voltage smaller than a voltage of the low potential power supply to the gate of the N-channel MOS transistor.
9. The voltage generator circuit according to claim 7 , wherein the transistor is a P-channel MOS transistor, and the sub-threshold current shut-off circuit supplies a boost voltage greater than a voltage of the high potential power supply to the gate of the P-channel MOS transistor.
10. The voltage generator circuit according to claim 7 , wherein the MOS transistor is an N-channel MOS transistor, and the sub-threshold current shut-off circuit supplies the back gate of the N-channel MOS transistor with a substrate voltage smaller than a voltage of a low potential power supply.
11. The voltage generator circuit according to claim 7 , wherein the transistor is a P-channel MOS transistor, and the sub-threshold current shut-off circuit supplies the back gate of the P-channel MOS transistor with a boost voltage greater than a voltage of a high potential power supply.
12. A semiconductor device comprising:
a voltage generator circuit including:
a voltage generator activated by a reference voltage to generate an output voltage;
a reference voltage clamp circuit coupled to the voltage generator for clamping the reference voltage to a predetermined clamp voltage in response to a power-down signal to deactivate the voltage generator; and
a sub-threshold current reduction circuit including a resistor coupled between the voltage generator and one of a high potential power supply and a low potential power supply, wherein a resistance value of the resistor is at least 10 5 Ω to maintain the output voltage to a value slightly higher than the voltage of the low potential power supply so that a sub-threshold current flowing into the voltage generator is reduced when the voltage generator is deactivated; and
an internal circuit coupled to the voltage generator and enabled by the output voltage.
13. A method of controlling a voltage generator circuit having a voltage generator for generating an internal voltage supplied to an internal circuit, comprising the steps of:
deactivating the voltage generator in response to a power-down signal; and
setting the internal voltage of the voltage generator to a balance voltage at which a sub-threshold current flowing into the voltage generator balances a sub-threshold current flowing into the internal circuit when the voltage generator is deactivated.