IP Library Granted Patent US 6,683,805
Granted Patent Utility
US 6,683,805 · Confirmation No. 7887

SUPPRESSION OF LEAKAGE CURRENTS IN VLSI LOGIC AND MEMORY CIRCUITS

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Code Description Pages PDF
2003-12-08 LET. Miscellaneous Incoming Letter 1 View
2003-12-08 LET. Miscellaneous Incoming Letter 1 View
2003-12-08 DRW Drawings-only black and white line drawings 9 View
2002-02-05 TRNA Transmittal of New Application 5 View
2002-02-05 SPEC Specification 14 View
2002-02-05 CLM Claims 9 View
2002-02-05 ABST Abstract 1 View
2002-02-05 DRW Drawings-only black and white line drawings 6 View
2002-02-05 OATH Oath or Declaration filed 8 View
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Quick Facts
Patent No.
US 6,683,805
App. No.
10/067,411
Filed
2002-02-05
Granted
2004-01-27
Pub. No.
US20030147272A1
Examiner
HUR, JUNG H
Art Unit
2824
PTA
-5 days