Granted Patent B1

US 6,973,531 · App. 10/281,670 · Granted Dec 6, 2005

Abstract

Claims (85)

1. A method for processing elements included in a non-volatile memory of a memory system, the method comprising:

obtaining erase counts associated with a plurality of elements, the plurality of elements including erased elements and elements containing data, wherein each element included in the plurality of elements has an associated erase count, the associated erase count of each element being arranged to indicate a number of times the element has been erased;

defining a first set of erased elements, by selecting erased elements having highest associated erase counts relative to the erase counts associated with the plurality of elements; and

storing the erase counts associated with the first set in a memory component substantially within a table, wherein the memory component is associated with the memory system.

2. The method of claim 1 wherein the step of defining a first set of erased elements includes:

comparing the erase counts associated with the plurality of elements; and

identifying a predetermined number of erased elements having the highest associated erase counts.

3. The method of claim 1 further including:

obtaining an average erase count associated with the plurality of elements.

4. The method of claim 3 wherein the step of defining a first set of erased elements includes:

comparing the erase counts associated with the plurality of erased elements against the average erase count; and

identifying up to a predetermined number of erased elements having associated erase counts that are greater than the average erase count by greater than a predetermined margin.

5. The method of claim 1 further including:

sorting the erased elements in the first set of erased elements according to the erase count associated with each erased element in the first set.

6. The method of claim 5 wherein sorting the elements in the first set of erased elements includes sorting the erase counts within the table.

7. The method of claim 5 further including:

identifying a first element included in the first set of erased elements, the first element having the lowest erase count associated with the first set of erased elements.

8. The method of claim 7 further including:

disassociating the first element from the first set of erased elements; and

associating a second element of the plurality of elements with the first set of erased elements, wherein the erase count associated with the second element is higher than the erase count associated with the first element.

9. The method of claim 7 further including:

calculating an average erase count associated with the first set of erased elements;

determining when the erase count associated with a second erased element included in the plurality of elements is greater than the average erase count;

disassociating the first element from the first set of erased elements when it is determined that the erase count associated with the second element is greater than the average erase count; and

associating the second element with the first set of erased elements when it is determined that the erase count associated with the second element is greater than the average erase count.

10. The method of claim 1 wherein the non-volatile memory is flash memory.

11. The method of claim 10 wherein the plurality of elements are blocks, and the first set of erased elements is a set of most frequently erased blocks.

12. The method of claim 12 wherein obtaining the erase counts includes obtaining the erase counts from the erase count block.

13. The method of claim 10 wherein the flash memory is NAND flash memory.

14. A method for processing elements included in a non-volatile memory of a memory system, the method comprising:

obtaining erase counts associated with a plurality of elements, wherein each element included in the plurality of elements has an associated erase count, the associated erase count of each element being arranged to indicate a number of times the element has been erased;

grouping a number of elements included in the plurality of elements into a first set, wherein grouping the number of elements into the first set includes selecting erased elements included in the plurality of erased elements which have the highest associated erase counts of the erase counts associated with the plurality of erased elements;

storing the erase counts associated with the first set in a memory component substantially within a table, wherein the memory component is associated with the memory system; and

sorting the elements in the first set according to the erase count associated with each element;

identifying a first element included in the first set, the first element having the lowest erase count associated with the first set;

calculating an average erase count associated with the first set;

determining whether the erase count associated with a second erased element included in the plurality of elements is greater than the average erase count by more than a predetermined percentage;

disassociating the first element from the first set responsive to the erase count associated with the second element being greater than the average erase count by more than the predetermined percentage; and

associating the second element with the first set responsive to the erase count associated with the second element being greater than the average erase count by more than the predetermined percentage.

15. A memory management system for processing elements included in a non-volatile memory of a memory system, the memory management system comprising:

code devices for obtaining erase counts associated with a plurality of elements, the plurality of elements including erased elements and elements containing data, wherein each element included in the plurality of elements has an associated erase count, the associated erase count of each element being arranged to indicate a number of times the element has been erased;

code devices for defining a first set of erased element, by selecting erased elements having highest associated erase counts relative to the erase counts associated with the plurality of elements; and

code devices for storing the erase counts associated with the first set as a part of a data structure in a memory component, the memory component being associated with the memory system.

16. The memory management system of claim 15 wherein the code devices for defining a first set of erased elements include:

code devices for comparing the erase counts associated with the plurality of elements; and

code devices for identifying a predetermined number of erased elements having the highest associated erase counts.

17. The memory management system of claim 15 further including:

code devices for obtaining an average erase count associated with the plurality of elements, wherein the code devices for defining a first set of erased elements include code devices for comparing the erase counts associated with the plurality of erased elements against the average erase count and code devices for identifying up to a predetermined number of erased elements having associated erase counts that are greater than the average erase count by greater than a predetermined margin.

18. The memory management system of claim 15 further including:

code devices for sorting the erased elements in the first set of erased elements according to the erase count associated with each erased element;

code devices for identifying a first erased element included in the first set, the first erased element having the lowest erase count associated with the first set of erased elements;

code devices for associating a second erased element of the plurality of elements with the first set of erased elements, wherein the erase count associated with the second erased element is higher than the erase count associated with the first erased element.

19. The memory management system of claim 15 wherein the non-volatile memory is flash memory.

20. The memory management system of claim 15 wherein the plurality of elements are blocks, and the first set is a most frequently erased block table.

21. The memory management system of claim 15 wherein the flash memory is NAND flash memory.

22. A method for processing elements included in a non-volatile memory of a memory system, each element having an associated erase count, the method comprising:

identifying erased elements in the non-volatile memory;

defining a first set of erased elements, wherein the elements included in the first set of erased elements have associated erase counts that are high relative to erased elements not included in the first set of elements;

placing entries associated with the first set of elements, the entries including the associated erase counts, into a data structure;

sorting the entries within the data structure;

identifying a first element within the first set of elements using the sorted entries, wherein the first element has a lower associated erase count than other elements included in the first set of elements;

erasing the contents of a second element;

responsive to an associated erase count of the second element exceeding the associated erase count of the identified first element, removing the first element from the first set of erased elements; and

then adding the second element to the first set of erased elements.

23. The method of claim 22 further including:

determining a first average erase count, the first average erase count being determined using the associated erase count of each element in the first set;

and wherein the removing and adding steps are performed responsive to the associated erase count of the second element exceeding the first average erase count.

24. The method of claim 22 wherein removing the first element from the first set of erased elements includes removing an entry associated with the first element from the data structure, and wherein adding the second element to the first set includes placing an entry associated with the second element into the data structure.

25. The method of claim 24 further including:

resorting the entries within the data structure; and

identifying a third element within the first set of elements using the sorted entries, wherein the third element is less worn than other elements included in the first set of elements.

26. The method of claim 22 wherein the elements included in the first set of elements are effectively prevented from being used.

27. The method of claim 22 wherein the non-volatile memory is a flash memory, and the elements are blocks.

28. A memory system comprising:

memory elements;

a system memory component, for storing an associated erase count for each of the memory elements;

means for identifying erased ones of the memory elements;

means for defining a first set of the erased memory elements, wherein the memory elements included in the first set of erased memory elements have associated erase counts that are high relative to the erased memory elements not included in the first set of memory elements;

means for placing entries associated with the first set of erased memory elements, the entries including an erase count associated with each erased memory element, into a data structure associated with the system memory component;

means for sorting the entries within the data structure;

means identifying a first memory element within the first set of memory elements using the sorted entries, wherein the first memory element has a lower associated erase count than other memory elements included in the first set of memory elements; and

means for removing the first memory element from the first set of erased elements responsive to an associated erase count of the second element exceeding the associated erase count of the identified first element, and for then adding the second element to the first set of erased elements.

29. The memory system of claim 28 wherein the means for removing the first memory element from the first set include means for removing an entry associated with the first memory element from the data structure, and the means for adding the second memory element to the first set include means for placing an entry associated with the first set of memory elements into a data structure.

30. The memory system of claim 28 wherein the memory elements included in the first set of memory elements are effectively prevented from being used.

31. The memory system of claim 28 wherein the memory elements are non-volatile memory blocks.

Assignments (11)