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App. No. 10/461,504 · Confirmation No. 8589

METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

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2016-04-29 OATH Oath or Declaration filed 7 View
2004-04-29 IFEE Issue Fee Payment (PTO-85B) 1 View
2004-01-29 NOA Notice of Allowance and Fees Due (PTOL-85) 3 View
2004-01-29 NOA Notice of Allowance and Fees Due (PTOL-85) 5 View
2004-01-29 1449 List of References cited by applicant and considered by examiner 1 View
2004-01-29 IIFW Issue Information including classification, examiner, name, claim, renumbering, etc. 1 View
2004-01-29 FWCLM Index of Claims 1 View
2004-01-29 SRFW Search information including classification, databases and other search related notes 1 View
2004-01-10 SRNT Examiner's search strategy and results 2 View
2003-06-16 TRNA Transmittal of New Application 2 View
2003-06-16 A.PE Preliminary Amendment 3 View
2003-06-16 SPEC Specification 76 View
2003-06-16 CLM Claims 4 View
2003-06-16 ABST Abstract 1 View
2003-06-16 DRW Drawings-only black and white line drawings 109 View
2003-06-16 OATH Oath or Declaration filed 2 View
2003-06-16 WFEE Fee Worksheet (SB06) 1 View
2003-06-16 WFEE Fee Worksheet (SB06) 1 View
2003-06-16 IDS Information Disclosure Statement (IDS) Form (SB08) 3 View
2003-06-16 FRPR Certified Copy of Foreign Priority Application 1 View
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Quick Facts
App. No.
10/461,504
Filed
2003-06-16
Granted
2004-06-08
Pub. No.
US20030205766A1
Art Unit
2826
PTA
0 days